Searched refs:IMX8MQ_RESET_MIPI_CSI1_CORE_RESET (Results 1 – 4 of 4) sorted by relevance
49 #define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET 38 /* i.MX8MM/i.MX8MN does NOT support */ macro
144 resets = <&src IMX8MQ_RESET_MIPI_CSI1_CORE_RESET>,
205 [IMX8MQ_RESET_MIPI_CSI1_CORE_RESET] = { SRC_MIPIPHY1_RCR, BIT(0) },
1114 resets = <&src IMX8MQ_RESET_MIPI_CSI1_CORE_RESET>,
Completed in 10 milliseconds