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Searched refs:INTF_0 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_encoder_phys_vid.c18 (e)->hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__)
24 (e)->hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__)
416 phys_enc->hw_intf->idx - INTF_0, ret, enable, in dpu_encoder_phys_vid_control_vblank_irq()
472 hw_res->intfs[phys_enc->intf_idx - INTF_0] = INTF_MODE_VIDEO; in dpu_encoder_phys_vid_get_hw_resources()
590 phys_enc->hw_intf->idx - INTF_0, ret); in dpu_encoder_phys_vid_disable()
608 phys_enc->hw_intf->idx - INTF_0); in dpu_encoder_phys_vid_handle_post_kickoff()
622 phys_enc->hw_intf->idx - INTF_0, in dpu_encoder_phys_vid_irq_control()
A Ddpu_encoder_phys_cmd.c19 (e) ? (e)->base.intf_idx - INTF_0 : -1, ##__VA_ARGS__)
24 (e) ? (e)->base.intf_idx - INTF_0 : -1, ##__VA_ARGS__)
541 hw_res->intfs[phys_enc->intf_idx - INTF_0] = INTF_MODE_CMD; in dpu_encoder_phys_cmd_get_hw_resources()
672 phys_enc->intf_idx - INTF_0); in dpu_encoder_phys_cmd_wait_for_tx_complete()
762 DPU_DEBUG("intf %d\n", p->intf_idx - INTF_0); in dpu_encoder_phys_cmd_init()
A Ddpu_rm.c177 if (intf->id < INTF_0 || intf->id >= INTF_MAX) { in dpu_rm_init()
187 rm->intf_blks[intf->id - INTF_0] = &hw->base; in dpu_rm_init()
461 int idx = id - INTF_0; in _dpu_rm_reserve_intf()
494 id = i + INTF_0; in _dpu_rm_reserve_intf_related_hw()
A Ddpu_rm.h30 struct dpu_hw_blk *intf_blks[INTF_MAX - INTF_0];
A Ddpu_hw_ctl.c233 case INTF_0: in dpu_hw_ctl_update_pending_flush_intf()
253 ctx->pending_intf_flush_mask |= BIT(intf - INTF_0); in dpu_hw_ctl_update_pending_flush_intf_v1()
505 intf_active |= BIT(cfg->intf - INTF_0); in dpu_hw_ctl_intf_cfg_v1()
A Ddpu_kms.h147 uint32_t intf_to_enc_id[INTF_MAX - INTF_0];
A Ddpu_hw_catalog.c840 INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SDM845_MASK, MDP_SSPP_TOP0_INTR, 24, 25),
847 …INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, MSM_DP_CONTROLLER_0, 24, INTF_SC7180_MASK, MDP_SSPP_T…
852 INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 24, 25),
859 INTF_BLK("intf_0", INTF_0, 0x34000, INTF_DP, 0, 24, INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 24, 25),
A Ddpu_hw_mdss.h198 INTF_0 = 1, enumerator
A Ddpu_encoder.c39 (p) ? (p)->intf_idx - INTF_0 : -1, \
45 (p) ? (p)->intf_idx - INTF_0 : -1, \
250 DRMID(phys_enc->parent), phys_enc->intf_idx - INTF_0, in dpu_encoder_helper_report_irq_timeout()
1879 phys->intf_idx - INTF_0, in _dpu_encoder_status_show()

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