/linux/drivers/crypto/marvell/octeontx2/ |
A D | otx2_cptpf_main.c | 71 INTR_MASK(num_vfs)); in cptpf_enable_vf_flr_me_intrs() 75 RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(num_vfs)); in cptpf_enable_vf_flr_me_intrs() 78 INTR_MASK(num_vfs)); in cptpf_enable_vf_flr_me_intrs() 81 RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(num_vfs)); in cptpf_enable_vf_flr_me_intrs() 87 INTR_MASK(num_vfs - 64)); in cptpf_enable_vf_flr_me_intrs() 89 RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(num_vfs - 64)); in cptpf_enable_vf_flr_me_intrs() 92 INTR_MASK(num_vfs - 64)); in cptpf_enable_vf_flr_me_intrs() 94 RVU_PF_VFME_INT_ENA_W1SX(1), INTR_MASK(num_vfs - 64)); in cptpf_enable_vf_flr_me_intrs() 104 RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(num_vfs)); in cptpf_disable_vf_flr_me_intrs() 110 RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(num_vfs)); in cptpf_disable_vf_flr_me_intrs() [all …]
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/linux/drivers/net/ethernet/marvell/octeontx2/af/ |
A D | rvu.c | 2505 RVU_AF_PFAF_MBOX_INT, INTR_MASK(hw->total_pfs)); in rvu_enable_mbox_intr() 2509 INTR_MASK(hw->total_pfs) & ~1ULL); in rvu_enable_mbox_intr() 2738 INTR_MASK(rvu->hw->total_pfs) & ~1ULL); in rvu_unregister_interrupts() 2742 INTR_MASK(rvu->hw->total_pfs) & ~1ULL); in rvu_unregister_interrupts() 2746 INTR_MASK(rvu->hw->total_pfs) & ~1ULL); in rvu_unregister_interrupts() 2836 INTR_MASK(rvu->hw->total_pfs) & ~1ULL); in rvu_register_interrupts() 2853 RVU_AF_PFTRPEND, INTR_MASK(rvu->hw->total_pfs)); in rvu_register_interrupts() 2856 RVU_AF_PFME_INT, INTR_MASK(rvu->hw->total_pfs)); in rvu_register_interrupts() 2859 INTR_MASK(rvu->hw->total_pfs) & ~1ULL); in rvu_register_interrupts() 3013 INTR_MASK(vfs - 64)); in rvu_disable_afvf_intr() [all …]
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A D | mbox.h | 34 #define INTR_MASK(pfvfs) ((pfvfs < 64) ? (BIT_ULL(pfvfs) - 1) : (~0ull)) macro
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/linux/drivers/net/ethernet/chelsio/cxgb3/ |
A D | vsc8211.c | 71 #define INTR_MASK (CFG_CHG_INTR_MASK | VSC_INTR_TX_FIFO | VSC_INTR_RX_FIFO | \ macro 100 INTR_MASK); in vsc8211_intr_enable() 331 cause &= INTR_MASK; in vsc8211_intr_handler()
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/linux/drivers/staging/qlge/ |
A D | qlge_mpi.c | 222 qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); in qlge_idc_req_aen() 291 qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); in qlge_link_up() 537 qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); in qlge_mailbox_command() 603 qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI); in qlge_mailbox_command() 1239 qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); in qlge_mpi_work() 1253 qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI); in qlge_mpi_work()
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A D | qlge.h | 819 INTR_MASK = 0x38, enumerator
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A D | qlge_main.c | 2413 (qlge_read32(qdev, INTR_MASK) & INTR_MASK_PI)) { in qlge_isr() 2420 qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); in qlge_isr() 3581 qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI); in qlge_adapter_initialize()
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/linux/drivers/net/ethernet/marvell/octeontx2/nic/ |
A D | otx2_pf.c | 80 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs)); in otx2_disable_flr_me_intr() 85 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs)); in otx2_disable_flr_me_intr() 92 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in otx2_disable_flr_me_intr() 248 otx2_write64(pf, RVU_PF_VFME_INTX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr() 249 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr() 252 otx2_write64(pf, RVU_PF_VFFLR_INTX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr() 258 otx2_write64(pf, RVU_PF_VFME_INTX(1), INTR_MASK(numvfs)); in otx2_register_flr_me_intr() 260 INTR_MASK(numvfs)); in otx2_register_flr_me_intr() 262 otx2_write64(pf, RVU_PF_VFFLR_INTX(1), INTR_MASK(numvfs)); in otx2_register_flr_me_intr() 264 INTR_MASK(numvfs)); in otx2_register_flr_me_intr() [all …]
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/linux/drivers/usb/host/ |
A D | ehci-hcd.c | 94 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) macro 666 ehci_writel(ehci, INTR_MASK, in ehci_run() 737 masked_status = current_status & (INTR_MASK | STS_FLR); in ehci_irq() 750 if (current_status & INTR_MASK) in ehci_irq() 1164 int mask = INTR_MASK; in ehci_resume()
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A D | ehci-hub.c | 358 mask = INTR_MASK; in ehci_bus_suspend() 506 ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable); in ehci_bus_resume()
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A D | oxu210hp-hcd.c | 151 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) macro 2873 status &= INTR_MASK; in oxu210_hcd_irq() 3168 writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */ in oxu_run() 3918 mask = INTR_MASK; in oxu_bus_suspend() 4005 writel(INTR_MASK, &oxu->regs->intr_enable); in oxu_bus_resume()
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A D | fotg210-hcd.c | 78 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) macro 5073 fotg210_writel(fotg210, INTR_MASK, in fotg210_run() 5137 masked_status = status & (INTR_MASK | STS_FLR); in fotg210_irq()
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/linux/drivers/net/ethernet/cavium/thunder/ |
A D | nic_main.c | 103 #define INTR_MASK(vfs) ((vfs < 64) ? (BIT_ULL(vfs) - 1) : (~0ull)) in nic_enable_mbx_intr() macro 106 nic_reg_write(nic, NIC_PF_MAILBOX_INT, INTR_MASK(vf_cnt)); in nic_enable_mbx_intr() 109 nic_reg_write(nic, NIC_PF_MAILBOX_ENA_W1S, INTR_MASK(vf_cnt)); in nic_enable_mbx_intr() 113 INTR_MASK(vf_cnt - 64)); in nic_enable_mbx_intr() 115 INTR_MASK(vf_cnt - 64)); in nic_enable_mbx_intr()
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/linux/drivers/gpu/drm/rockchip/ |
A D | rockchip_drm_vop.h | 223 #define INTR_MASK (DSP_HOLD_VALID_INTR | FS_INTR | \ macro
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A D | rockchip_drm_vop.c | 1710 active_irqs = VOP_INTR_GET_TYPE(vop, status, INTR_MASK); in vop_isr() 1969 VOP_INTR_SET_TYPE(vop, clear, INTR_MASK, 1); in vop_initial() 1970 VOP_INTR_SET_TYPE(vop, enable, INTR_MASK, 0); in vop_initial()
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/linux/drivers/input/keyboard/ |
A D | spear-keyboard.c | 32 #define INTR_MASK 0x54 macro
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