| /linux/drivers/gpu/drm/i915/display/ |
| A D | g4x_dp.c | 86 } else if (IS_VALLEYVIEW(dev_priv)) { in g4x_dp_set_clock()
483 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dp_link_down()
672 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_enable_dp()
682 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_enable_dp()
1288 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dp_encoder_reset()
1345 } else if (IS_VALLEYVIEW(dev_priv)) { in g4x_dp_init()
1366 else if (IS_VALLEYVIEW(dev_priv)) in g4x_dp_init()
1375 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv) || in g4x_dp_init()
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| A D | intel_pps.c | 368 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_pps_get_registers()
410 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in edp_have_panel_power()
423 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in edp_have_panel_vdd()
1299 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in pps_init_registers()
1360 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_pps_encoder_reset()
1390 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_pps_unlock_regs_wa()
1407 else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_pps_setup()
1446 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in assert_pps_unlocked()
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| A D | intel_dsi_vbt.c | 384 else if (IS_VALLEYVIEW(dev_priv)) in mipi_exec_gpio()
874 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_vbt_gpio_init()
880 if (IS_VALLEYVIEW(dev_priv) && mipi_config->pwm_blc == PPS_BLC_SOC) { in intel_dsi_vbt_gpio_init()
934 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_vbt_gpio_cleanup()
938 if (IS_VALLEYVIEW(dev_priv) && mipi_config->pwm_blc == PPS_BLC_SOC) { in intel_dsi_vbt_gpio_cleanup()
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| A D | intel_pipe_crc.c | 417 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in get_new_crc_ctl_reg()
547 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_is_valid_crc_source()
623 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_crtc_set_crc_source()
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| A D | intel_drrs.c | 142 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_drrs_set_state()
147 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_drrs_set_state()
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| A D | intel_vga.c | 17 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_vga_cntrl_reg()
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| A D | intel_cdclk.c | 477 if (IS_VALLEYVIEW(dev_priv) && min_cdclk > freq_320) in vlv_calc_cdclk()
489 if (IS_VALLEYVIEW(dev_priv)) { in vlv_calc_voltage_level()
524 if (IS_VALLEYVIEW(dev_priv)) in vlv_get_cdclk()
2150 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_crtc_compute_min_cdclk()
2159 IS_VALLEYVIEW(dev_priv)) in intel_crtc_compute_min_cdclk()
2714 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_update_max_cdclk()
2746 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_update_cdclk()
2877 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_read_rawclk()
3081 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_init_cdclk_hooks()
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| A D | intel_crtc.c | 303 IS_VALLEYVIEW(dev_priv) || IS_G4X(dev_priv)) in intel_crtc_init()
398 bool need_vlv_dsi_wa = (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_pipe_update_start()
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| A D | i9xx_plane.c | 799 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_primary_plane_create()
833 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_primary_plane_create()
859 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_primary_plane_create()
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| A D | intel_crt.c | 356 else if (IS_VALLEYVIEW(dev_priv)) in intel_crt_mode_valid()
567 if (IS_VALLEYVIEW(dev_priv)) in intel_crt_detect_hotplug()
1004 else if (IS_VALLEYVIEW(dev_priv)) in intel_crt_init()
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| A D | intel_lpe_audio.c | 185 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in lpe_audio_detect()
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| A D | intel_audio.c | 707 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in ilk_audio_codec_disable()
767 } else if (IS_VALLEYVIEW(dev_priv) || in ilk_audio_codec_enable()
941 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_init_audio_hooks()
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| /linux/drivers/gpu/drm/i915/ |
| A D | vlv_sideband.c | 43 if (IS_VALLEYVIEW(i915)) { in __vlv_punit_get()
51 if (IS_VALLEYVIEW(i915)) in __vlv_punit_put()
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| A D | vlv_suspend.c | 395 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in vlv_suspend_complete()
440 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in vlv_resume_prepare()
470 if (!IS_VALLEYVIEW(i915)) in vlv_suspend_init()
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| A D | i915_sysfs.c | 522 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in i915_setup_sysfs()
546 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_setup_sysfs()
564 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_teardown_sysfs()
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| A D | i915_drv.c | 160 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_setup_mchbar()
1595 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in intel_runtime_suspend()
1641 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) { in intel_runtime_resume()
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| A D | i915_irq.c | 187 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in intel_hpd_init_pins()
1592 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i9xx_hpd_irq_ack()
1631 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i9xx_hpd_irq_handler()
1646 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in i9xx_hpd_irq_handler()
4398 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_irq_init()
4448 else if (IS_VALLEYVIEW(dev_priv)) in intel_irq_handler()
4473 else if (IS_VALLEYVIEW(dev_priv)) in intel_irq_reset()
4498 else if (IS_VALLEYVIEW(dev_priv)) in intel_irq_postinstall()
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| A D | intel_device_info.c | 301 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_device_info_runtime_init()
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| A D | intel_uncore.c | 368 if (IS_VALLEYVIEW(uncore->i915)) in __gen6_gt_wait_for_fifo()
1907 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_uncore_fw_domains_init()
2130 } else if (IS_VALLEYVIEW(i915)) { in uncore_forcewake_init()
2184 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_uncore_init_mmio()
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| /linux/drivers/gpu/drm/i915/selftests/ |
| A D | intel_uncore.c | 169 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) { in live_forcewake_ops()
280 !IS_VALLEYVIEW(gt->i915) && in live_forcewake_domains()
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| /linux/drivers/gpu/drm/i915/gt/ |
| A D | intel_rc6.c | 555 else if (IS_VALLEYVIEW(i915)) in intel_rc6_init()
593 else if (IS_VALLEYVIEW(i915)) in intel_rc6_enable()
758 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_rc6_residency_ns()
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| A D | intel_rps.c | 699 if (IS_VALLEYVIEW(gt->i915)) in rps_set_power()
832 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in rps_set()
1385 else if (IS_VALLEYVIEW(i915)) in intel_rps_enable()
1480 else if (IS_VALLEYVIEW(i915)) in intel_gpu_freq()
1497 else if (IS_VALLEYVIEW(i915)) in intel_freq_opcode()
1856 else if (IS_VALLEYVIEW(i915)) in intel_rps_init()
1922 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_rps_get_cagf()
1943 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in read_cagf()
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| A D | selftest_rc6.c | 51 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) in live_rc6_manual()
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| A D | intel_ggtt_fencing.c | 572 if (GRAPHICS_VER(i915) >= 8 || IS_VALLEYVIEW(i915)) { in detect_bit_6_swizzle()
848 !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))) in intel_ggtt_init_fences()
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| A D | intel_gt_pm_debugfs.c | 272 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in drpc_show()
303 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_gt_pm_frequency_dump()
|