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Searched refs:IXGB_READ_REG (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/net/ethernet/intel/ixgb/
A Dixgb_hw.c144 IXGB_READ_REG(hw, ICR); in ixgb_adapter_stop()
958 IXGB_READ_REG(hw, TPRL); in ixgb_clear_hw_cntrs()
959 IXGB_READ_REG(hw, TPRH); in ixgb_clear_hw_cntrs()
974 IXGB_READ_REG(hw, TORL); in ixgb_clear_hw_cntrs()
977 IXGB_READ_REG(hw, RUC); in ixgb_clear_hw_cntrs()
978 IXGB_READ_REG(hw, ROC); in ixgb_clear_hw_cntrs()
983 IXGB_READ_REG(hw, MPC); in ixgb_clear_hw_cntrs()
1002 IXGB_READ_REG(hw, DC); in ixgb_clear_hw_cntrs()
1007 IXGB_READ_REG(hw, RFC); in ixgb_clear_hw_cntrs()
1008 IXGB_READ_REG(hw, LFC); in ixgb_clear_hw_cntrs()
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A Dixgb_ethtool.c221 *reg++ = IXGB_READ_REG(hw, MFS); /* 4 */ in ixgb_get_regs()
224 *reg++ = IXGB_READ_REG(hw, ICR); /* 5 */ in ixgb_get_regs()
225 *reg++ = IXGB_READ_REG(hw, ICS); /* 6 */ in ixgb_get_regs()
226 *reg++ = IXGB_READ_REG(hw, IMS); /* 7 */ in ixgb_get_regs()
227 *reg++ = IXGB_READ_REG(hw, IMC); /* 8 */ in ixgb_get_regs()
236 *reg++ = IXGB_READ_REG(hw, RDH); /* 15 */ in ixgb_get_regs()
237 *reg++ = IXGB_READ_REG(hw, RDT); /* 16 */ in ixgb_get_regs()
254 *reg++ = IXGB_READ_REG(hw, TDH); /* 57 */ in ixgb_get_regs()
255 *reg++ = IXGB_READ_REG(hw, TDT); /* 58 */ in ixgb_get_regs()
259 *reg++ = IXGB_READ_REG(hw, PAP); /* 62 */ in ixgb_get_regs()
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A Dixgb_main.c224 u32 ctrl0 = IXGB_READ_REG(hw, CTRL0); in ixgb_up()
288 u32 ctrl0 = IXGB_READ_REG(hw, CTRL0); in ixgb_reset()
788 rctl = IXGB_READ_REG(&adapter->hw, RCTL); in ixgb_setup_rctl()
829 rctl = IXGB_READ_REG(hw, RCTL); in ixgb_configure_rx()
856 rxcsum = IXGB_READ_REG(hw, RXCSUM); in ixgb_configure_rx()
1062 rctl = IXGB_READ_REG(hw, RCTL); in ixgb_set_multi()
1729 u32 icr = IXGB_READ_REG(hw, ICR); in ixgb_intr()
1853 IXGB_READ_REG(&adapter->hw, TDH), in ixgb_clean_tx_irq()
1854 IXGB_READ_REG(&adapter->hw, TDT), in ixgb_clean_tx_irq()
2132 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0); in ixgb_vlan_strip_enable()
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A Dixgb_ee.c78 eecd_reg = IXGB_READ_REG(hw, EECD); in ixgb_shift_out_bits()
127 eecd_reg = IXGB_READ_REG(hw, EECD); in ixgb_shift_in_bits()
136 eecd_reg = IXGB_READ_REG(hw, EECD); in ixgb_shift_in_bits()
161 eecd_reg = IXGB_READ_REG(hw, EECD); in ixgb_setup_eeprom()
182 eecd_reg = IXGB_READ_REG(hw, EECD); in ixgb_standby_eeprom()
219 eecd_reg = IXGB_READ_REG(hw, EECD); in ixgb_clock_eeprom()
244 eecd_reg = IXGB_READ_REG(hw, EECD); in ixgb_cleanup_eeprom()
280 eecd_reg = IXGB_READ_REG(hw, EECD); in ixgb_wait_eeprom_command()
A Dixgb_osdep.h26 #define IXGB_READ_REG(a, reg) ( \ macro
35 #define IXGB_WRITE_FLUSH(a) IXGB_READ_REG(a, STATUS)

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