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Searched refs:JZ4770_CLK_PLL0 (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/clk/ingenic/
A Djz4770-cgu.c102 [JZ4770_CLK_PLL0] = {
152 .parents = { JZ4770_CLK_PLL0, },
160 .parents = { JZ4770_CLK_PLL0, },
168 .parents = { JZ4770_CLK_PLL0, },
177 .parents = { JZ4770_CLK_PLL0, },
185 .parents = { JZ4770_CLK_PLL0, },
194 .parents = { JZ4770_CLK_PLL0, },
272 JZ4770_CLK_PLL0, JZ4770_CLK_PLL1 },
279 JZ4770_CLK_PLL0, JZ4770_CLK_PLL1 },
286 JZ4770_CLK_PLL0, JZ4770_CLK_PLL1 },
[all …]
/linux/include/dt-bindings/clock/
A Dingenic,jz4770-cgu.h11 #define JZ4770_CLK_PLL0 2 macro
/linux/arch/mips/boot/dts/ingenic/
A Djz4770.dtsi242 <&cgu JZ4770_CLK_EXT>, <&cgu JZ4770_CLK_PLL0>;
A Dgcw0.dts463 <&cgu JZ4770_CLK_PLL0>,

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