Home
last modified time | relevance | path

Searched refs:LANE_COUNT_DP_MAX (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/inc/
A Ddc_link_dp.h127 union lane_status ln_status[LANE_COUNT_DP_MAX],
129 union lane_adjust ln_adjust[LANE_COUNT_DP_MAX],
152 const struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX],
153 union dpcd_training_lane dpcd_lane_settings[LANE_COUNT_DP_MAX]);
156 const union lane_adjust ln_adjust[LANE_COUNT_DP_MAX],
157 struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX],
158 union dpcd_training_lane dpcd_lane_settings[LANE_COUNT_DP_MAX]);
/linux/drivers/gpu/drm/amd/display/include/
A Dlink_service_types.h97 struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX];
143 struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX];
144 union dpcd_training_lane dpcd_lane_settings[LANE_COUNT_DP_MAX];
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc_link_dpia.c267 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = { { {0} } }; in dpia_training_cr_non_transparent()
269 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = { { {0} } }; in dpia_training_cr_non_transparent()
423 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = { { {0} } }; in dpia_training_cr_transparent()
425 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = { { {0} } }; in dpia_training_cr_transparent()
576 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = { { {0} } }; in dpia_training_eq_non_transparent()
577 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = { { {0} } }; in dpia_training_eq_non_transparent()
713 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = { { {0} } }; in dpia_training_eq_transparent()
714 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = { { {0} } }; in dpia_training_eq_transparent()
A Ddc_link_dp.c110 struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);
690 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in dp_hw_to_dpcd_lane_settings()
716 const union lane_adjust ln_adjust[LANE_COUNT_DP_MAX], in dp_decide_lane_settings() argument
722 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in dp_decide_lane_settings()
828 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in maximize_lane_settings()
851 for (lane = 1; lane < LANE_COUNT_DP_MAX; lane++) { in override_lane_settings()
868 union lane_status ln_status[LANE_COUNT_DP_MAX], in dp_get_lane_status_and_lane_adjust() argument
870 union lane_adjust ln_adjust[LANE_COUNT_DP_MAX], in dp_get_lane_status_and_lane_adjust() argument
1268 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX]; in perform_clock_recovery_sequence()
1572 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) {
[all …]
/linux/drivers/gpu/drm/amd/display/dc/
A Ddc_link.h125 struct dc_lane_settings cur_lane_setting[LANE_COUNT_DP_MAX];
A Ddc_dp_types.h37 LANE_COUNT_DP_MAX = LANE_COUNT_FOUR enumerator

Completed in 26 milliseconds