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Searched refs:LS1X_CLK_PLL_FREQ (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/clk/loongson1/
A Dclk-loongson1c.c23 pll = __raw_readl(LS1X_CLK_PLL_FREQ); in ls1x_pll_recalc_rate()
73 0, LS1X_CLK_PLL_FREQ, DIV_DDR_SHIFT, in ls1x_clk_init()
A Dclk-loongson1b.c24 pll = __raw_readl(LS1X_CLK_PLL_FREQ); in ls1x_pll_recalc_rate()
/linux/arch/mips/include/asm/mach-loongson32/
A Dregs-clk.h14 #define LS1X_CLK_PLL_FREQ LS1X_CLK_REG(0x0) macro

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