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Searched refs:MB_WIDTH (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/media/platform/s5p-mfc/
A Ds5p_mfc_opr_v6.h20 #define MB_WIDTH(x_size) DIV_ROUND_UP(x_size, 16) macro
22 #define S5P_MFC_DEC_MV_SIZE_V6(x, y) (MB_WIDTH(x) * \
24 #define S5P_MFC_DEC_MV_SIZE_V10(x, y) (MB_WIDTH(x) * \
A Ds5p_mfc_opr_v6.c67 mb_width = MB_WIDTH(ctx->img_width); in s5p_mfc_alloc_codec_buffers_v6()
475 mb_width = MB_WIDTH(ctx->img_width); in s5p_mfc_enc_calc_src_size_v6()
/linux/drivers/staging/media/hantro/
A Dhantro_hw.h20 #define MB_WIDTH(w) DIV_ROUND_UP(w, MB_DIM) macro
287 return 64 * MB_WIDTH(width) * MB_WIDTH(height) + 32; in hantro_h264_mv_size()
A Dhantro_g1_h264_dec.c52 reg = G1_REG_DEC_CTRL1_PIC_MB_WIDTH(MB_WIDTH(ctx->src_fmt.width)) | in set_params()
233 offset = bytes_per_mb * MB_WIDTH(ctx->src_fmt.width) * in set_buffers()
241 offset += 32 * MB_WIDTH(ctx->src_fmt.width) * in set_buffers()
A Dhantro_postproc.c101 HANTRO_PP_REG_WRITE(vpu, input_width, MB_WIDTH(ctx->dst_fmt.width)); in hantro_postproc_enable()
107 HANTRO_PP_REG_WRITE(vpu, orig_width, MB_WIDTH(ctx->dst_fmt.width)); in hantro_postproc_enable()
A Drockchip_vpu2_hw_h264_dec.c264 VDPU_REG_PIC_MB_WIDTH(MB_WIDTH(ctx->src_fmt.width)); in set_params()
450 offset = bytes_per_mb * MB_WIDTH(ctx->src_fmt.width) * in set_buffers()
458 offset += 32 * MB_WIDTH(ctx->src_fmt.width) * in set_buffers()
A Drockchip_vpu2_hw_jpeg_enc.c162 reg = VEPU_REG_MB_WIDTH(MB_WIDTH(ctx->src_fmt.width)) in rockchip_vpu2_jpeg_enc_run()
A Dhantro_h1_jpeg_enc.c130 reg = H1_REG_ENC_CTRL_WIDTH(MB_WIDTH(ctx->src_fmt.width)) in hantro_h1_jpeg_enc_run()
A Dhantro_g1_mpeg2_dec.c196 reg = G1_REG_PIC_MB_WIDTH(MB_WIDTH(ctx->dst_fmt.width)) | in hantro_g1_mpeg2_dec_run()
A Drockchip_vpu2_hw_mpeg2_dec.c213 reg = VDPU_REG_PIC_MB_WIDTH(MB_WIDTH(ctx->dst_fmt.width)) | in rockchip_vpu2_mpeg2_dec_run()
A Dhantro_g1_vp8_dec.c477 mb_width = MB_WIDTH(width); in hantro_g1_vp8_dec_run()
A Drockchip_vpu2_hw_vp8_dec.c567 mb_width = MB_WIDTH(width); in rockchip_vpu2_vp8_dec_run()

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