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Searched refs:MC_SEQ_MISC0 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/radeon/
A Dbtcd.h119 #define MC_SEQ_MISC0 0x2a00 macro
A Dnid.h209 #define MC_SEQ_MISC0 0x2a00 macro
790 #define MC_SEQ_MISC0 0x2a00 macro
A Drv770d.h285 #define MC_SEQ_MISC0 0x2a00 macro
A Dsid.h551 #define MC_SEQ_MISC0 0x2a00 macro
A Dcikd.h676 #define MC_SEQ_MISC0 0x2a00 macro
A Drv770_dpm.c733 tmp = RREG32(MC_SEQ_MISC0) & 3; in rv770_calculate_memory_refresh_rate()
1596 tmp = RREG32(MC_SEQ_MISC0); in rv770_get_memory_type()
A Dni.c658 mem_type = (RREG32(MC_SEQ_MISC0) & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT; in ni_mc_load_microcode()
A Dci_dpm.c2466 tmp = RREG32(MC_SEQ_MISC0); in ci_register_patching_mc_arb()
4504 tmp = RREG32(MC_SEQ_MISC0); in ci_register_patching_mc_seq()
5061 tmp = RREG32(MC_SEQ_MISC0); in ci_get_memory_type()
A Dsi.c1775 if (((RREG32(MC_SEQ_MISC0) & 0xff000000) >> 24) == 0x58) in si_init_microcode()
5837 tmp = RREG32(MC_SEQ_MISC0); in si_lbpw_supported()
A Dsi_dpm.c3191 tmp = RREG32(MC_SEQ_MISC0); in si_is_special_1gb_platform()
4266 dram_refresh_rate = 1 << ((RREG32(MC_SEQ_MISC0) & 0x3) + 3); in si_calculate_memory_refresh_rate()
A Dcik.c1920 tmp = RREG32(MC_SEQ_MISC0); in ci_mc_load_microcode()
/linux/drivers/gpu/drm/amd/amdgpu/
A Dsid.h552 #define MC_SEQ_MISC0 0xA80 macro
/linux/drivers/gpu/drm/amd/pm/powerplay/
A Dsi_dpm.c3649 tmp = RREG32(MC_SEQ_MISC0); in si_is_special_1gb_platform()
4730 dram_refresh_rate = 1 << ((RREG32(MC_SEQ_MISC0) & 0x3) + 3); in si_calculate_memory_refresh_rate()

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