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Searched refs:MC_SEQ_MISC_TIMING2_LP (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/radeon/
A Dbtcd.h150 #define MC_SEQ_MISC_TIMING2_LP 0x2a78 macro
A Dbtc_dpm.c1868 *out_reg = MC_SEQ_MISC_TIMING2_LP >> 2; in btc_check_s0_mc_reg_index()
2031 WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2)); in btc_initialize_mc_reg_table()
A Dnid.h808 #define MC_SEQ_MISC_TIMING2_LP 0x2a78 macro
A Dsid.h576 #define MC_SEQ_MISC_TIMING2_LP 0x2a78 macro
A Dcikd.h701 #define MC_SEQ_MISC_TIMING2_LP 0x2a78 macro
A Devergreend.h326 #define MC_SEQ_MISC_TIMING2_LP 0x2a78 macro
A Dni_dpm.c2784 *out_reg = MC_SEQ_MISC_TIMING2_LP >> 2; in ni_check_s0_mc_reg_index()
2887 WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2)); in ni_initialize_mc_reg_table()
A Dcypress_dpm.c982 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC_TIMING2_LP >> 2; in cypress_set_mc_reg_address_table()
A Dci_dpm.c4397 *out_reg = MC_SEQ_MISC_TIMING2_LP >> 2; in ci_check_s0_mc_reg_index()
4608 WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2)); in ci_initialize_mc_reg_table()
A Dsi_dpm.c5421 *out_reg = MC_SEQ_MISC_TIMING2_LP >> 2; in si_check_s0_mc_reg_index()
5528 WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2)); in si_initialize_mc_reg_table()
/linux/drivers/gpu/drm/amd/amdgpu/
A Dsid.h577 #define MC_SEQ_MISC_TIMING2_LP 0xA9E macro
/linux/drivers/gpu/drm/amd/pm/powerplay/
A Dsi_dpm.c5874 *out_reg = MC_SEQ_MISC_TIMING2_LP; in si_check_s0_mc_reg_index()
5981 WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2)); in si_initialize_mc_reg_table()

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