Home
last modified time | relevance | path

Searched refs:MC_SEQ_RAS_TIMING_LP (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/radeon/
A Dbtcd.h147 #define MC_SEQ_RAS_TIMING_LP 0x2a6c macro
A Dbtc_dpm.c1859 *out_reg = MC_SEQ_RAS_TIMING_LP >> 2; in btc_check_s0_mc_reg_index()
2028 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING)); in btc_initialize_mc_reg_table()
A Dnid.h805 #define MC_SEQ_RAS_TIMING_LP 0x2a6c macro
A Dsid.h573 #define MC_SEQ_RAS_TIMING_LP 0x2a6c macro
A Dcikd.h698 #define MC_SEQ_RAS_TIMING_LP 0x2a6c macro
A Devergreend.h323 #define MC_SEQ_RAS_TIMING_LP 0x2a6c macro
A Dni_dpm.c2775 *out_reg = MC_SEQ_RAS_TIMING_LP >> 2; in ni_check_s0_mc_reg_index()
2884 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING)); in ni_initialize_mc_reg_table()
A Dcypress_dpm.c970 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_RAS_TIMING_LP >> 2; in cypress_set_mc_reg_address_table()
A Dci_dpm.c4376 *out_reg = MC_SEQ_RAS_TIMING_LP >> 2; in ci_check_s0_mc_reg_index()
4599 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING)); in ci_initialize_mc_reg_table()
A Dsi_dpm.c5412 *out_reg = MC_SEQ_RAS_TIMING_LP >> 2; in si_check_s0_mc_reg_index()
5525 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING)); in si_initialize_mc_reg_table()
/linux/drivers/gpu/drm/amd/amdgpu/
A Dsid.h574 #define MC_SEQ_RAS_TIMING_LP 0xA9B macro
/linux/drivers/gpu/drm/amd/pm/powerplay/
A Dsi_dpm.c5865 *out_reg = MC_SEQ_RAS_TIMING_LP; in si_check_s0_mc_reg_index()
5978 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING)); in si_initialize_mc_reg_table()

Completed in 103 milliseconds