MC_SEQ_WR_CTL_D1 (reference) in projects: linux

Searched refs:MC_SEQ_WR_CTL_D1 (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/radeon/
A D	btcd.h	`112 #define MC_SEQ_WR_CTL_D1 0x28c0 macro`
A D	btc_dpm.c	`1879 case MC_SEQ_WR_CTL_D1 >> 2: in btc_check_s0_mc_reg_index() 2035 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in btc_initialize_mc_reg_table()`
A D	nid.h	`788 #define MC_SEQ_WR_CTL_D1 0x28c0 macro`
A D	sid.h	`549 #define MC_SEQ_WR_CTL_D1 0x28c0 macro`
A D	cikd.h	`662 #define MC_SEQ_WR_CTL_D1 0x28c0 macro`
A D	evergreend.h	`294 #define MC_SEQ_WR_CTL_D1 0x28c0 macro`
A D	ci_dpm.c	`4414 case MC_SEQ_WR_CTL_D1 >> 2: in ci_check_s0_mc_reg_index() 4532 case MC_SEQ_WR_CTL_D1: in ci_register_patching_mc_seq() 4613 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in ci_initialize_mc_reg_table()`
A D	ni_dpm.c	`2795 case MC_SEQ_WR_CTL_D1 >> 2: in ni_check_s0_mc_reg_index() 2892 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in ni_initialize_mc_reg_table()`
A D	cypress_dpm.c	`999 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_WR_CTL_D1 >> 2; in cypress_set_mc_reg_address_table()`
A D	si_dpm.c	`5432 case MC_SEQ_WR_CTL_D1 >> 2: in si_check_s0_mc_reg_index() 5533 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in si_initialize_mc_reg_table()`
/linux/drivers/gpu/drm/amd/amdgpu/
A D	sid.h	`550 #define MC_SEQ_WR_CTL_D1 0xA30 macro`
/linux/drivers/gpu/drm/amd/pm/powerplay/
A D	si_dpm.c	`5885 case MC_SEQ_WR_CTL_D1: in si_check_s0_mc_reg_index() 5986 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in si_initialize_mc_reg_table()`

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