| /linux/Documentation/fb/ |
| A D | viafb.modes | 29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz
95 # D: 43.163 MHz, H: 50.900 kHz, V: 100.00 Hz
116 # D: 52.406 MHz, H: 61.800 kHz, V: 120.00 Hz
137 # D: 26.880 MHz, H: 30.000 kHz, V: 60.24 Hz
158 # D: 29.500 MHz, H: 29.738 kHz, V: 60.00 Hz
179 # D: 32.668 MHz, H: 35.820 kHz, V: 60.00 Hz
200 # D: 40.00 MHz, H: 37.879 kHz, V: 60.32 Hz
[all …]
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| /linux/drivers/media/dvb-frontends/ |
| A D | dvb-pll.c | 74 .min = 177 * MHz,
75 .max = 858 * MHz,
96 .min = 177 * MHz,
97 .max = 896 * MHz,
120 .min = 185 * MHz,
272 .min = 47 * MHz,
273 .max = 863 * MHz,
290 .min = 54 * MHz,
291 .max = 864 * MHz,
307 .min = 54 * MHz,
[all …]
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| A D | dvb_dummy_fe.c | 216 .frequency_min_hz = 51 * MHz,
217 .frequency_max_hz = 858 * MHz,
250 .frequency_min_hz = 950 * MHz,
251 .frequency_max_hz = 2150 * MHz,
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| /linux/Documentation/userspace-api/media/dvb/ |
| A D | fe-bandwidth-t.rst | 34 - 1.712 MHz
42 - 5 MHz
50 - 6 MHz
58 - 7 MHz
66 - 8 MHz
74 - 10 MHz
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| /linux/arch/arm64/boot/dts/exynos/ |
| A D | exynos5433-tmu.dtsi | 56 /* Set maximum frequency as 1800MHz */
62 /* Set maximum frequency as 1700MHz */
68 /* Set maximum frequency as 1600MHz */
74 /* Set maximum frequency as 1500MHz */
80 /* Set maximum frequency as 1400MHz */
86 /* Set maximum frequencyas 1200MHz */
92 /* Set maximum frequency as 1000MHz */
230 /* Set maximum frequency as 1200MHz */
236 /* Set maximum frequency as 1100MHz */
248 /* Set maximum frequency as 900MHz */
[all …]
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| /linux/Documentation/devicetree/bindings/mfd/ |
| A D | omap-usb-host.txt | 40 * "usbhost_120m_fck" - 120MHz Functional clock.
43 * "refclk_60m_int" - 60MHz internal reference clock for UTMI clock mux
44 * "refclk_60m_ext_p1" - 60MHz external ref. clock for Port 1's UTMI clock mux.
45 * "refclk_60m_ext_p2" - 60MHz external ref. clock for Port 2's UTMI clock mux
51 * "usb_host_hs_hsic480m_p1_clk" - Port 1 480MHz HSIC clock gate.
52 * "usb_host_hs_hsic480m_p2_clk" - Port 2 480MHz HSIC clock gate.
53 * "usb_host_hs_hsic480m_p3_clk" - Port 3 480MHz HSIC clock gate.
54 * "usb_host_hs_hsic60m_p1_clk" - Port 1 60MHz HSIC clock gate.
55 * "usb_host_hs_hsic60m_p2_clk" - Port 2 60MHz HSIC clock gate.
56 * "usb_host_hs_hsic60m_p3_clk" - Port 3 60MHz HSIC clock gate.
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| /linux/drivers/staging/sm750fb/ |
| A D | ddk750_chip.c | 9 #define MHz(x) ((x) * 1000000) macro
40 return MHz(130); in get_mxclk_freq()
101 if (frequency > MHz(336)) in set_memory_clock()
102 frequency = MHz(336); in set_memory_clock()
153 if (frequency > MHz(190)) in set_master_clock()
154 frequency = MHz(190); in set_master_clock()
240 set_chip_clock(MHz((unsigned int)p_init_param->chip_clock)); in ddk750_init_hw()
243 set_memory_clock(MHz(p_init_param->mem_clock)); in ddk750_init_hw()
246 set_master_clock(MHz(p_init_param->master_clock)); in ddk750_init_hw()
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| /linux/arch/arm/boot/dts/ |
| A D | integratorcp.dts | 49 /* The codec chrystal operates at 24.576 MHz */
65 /* This is a 25MHz chrystal on the base board */
72 /* The UART clock is 14.74 MHz divided from 25MHz by an ICS525 */
87 /* 24 MHz chrystal on the core module */
124 /* The KMI clock is the 24 MHz oscillator divided to 8MHz */
133 /* The timer clock is the 24 MHz oscillator divided to 1MHz */
149 /* TIMER0 runs directly on the 25MHz chrystal */
155 /* TIMER1 runs @ 1MHz */
161 /* TIMER2 runs @ 1MHz */
297 /* 640x480 16bpp @ 25.175MHz is 36827428 bytes/s */
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| A D | rk3288-veyron-mickey.dts | 86 * and don't let the GPU go faster than 400 MHz.
106 * - 800 MHz (hot)
107 * - 800 MHz - 696 MHz (hotter)
108 * - 696 MHz - min (very hot)
111 * - 800 MHz appears to be a "sweet spot" for me. I can run
113 * - After 696 MHz we stop lowering voltage, so throttling
139 /* At very hot, don't let GPU go over 300 MHz */
180 /* After 1st level throttle the GPU down to as low as 400 MHz */
200 /* When hot, GPU goes down to 300 MHz */
206 /* When really hot, don't let GPU go _above_ 300 MHz */
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| A D | exynos5422-odroid-core.dtsi | 41 /* derived from 532MHz MPLL */
67 /* derived from 666MHz CPLL */
85 /* derived from 666MHz CPLL */
97 /* derived from 600MHz DPLL */
112 /* derived from 666MHz CPLL */
133 /* derived from 532MHz MPLL */
151 /* derived from 666MHz CPLL */
160 /* derived from 666MHz CPLL */
181 /* derived from 532MHz MPLL */
199 /* derived from 600MHz DPLL */
[all …]
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| /linux/drivers/media/firewire/ |
| A D | firedtv-fe.c | 173 fi->frequency_min_hz = 950 * MHz; in fdtv_frontend_init()
174 fi->frequency_max_hz = 2150 * MHz; in fdtv_frontend_init()
193 fi->frequency_min_hz = 950 * MHz; in fdtv_frontend_init()
194 fi->frequency_max_hz = 2150 * MHz; in fdtv_frontend_init()
213 fi->frequency_min_hz = 47 * MHz; in fdtv_frontend_init()
214 fi->frequency_max_hz = 866 * MHz; in fdtv_frontend_init()
231 fi->frequency_min_hz = 49 * MHz; in fdtv_frontend_init()
232 fi->frequency_max_hz = 861 * MHz; in fdtv_frontend_init()
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| /linux/Documentation/admin-guide/pm/ |
| A D | intel-speed-select.rst | 154 base-frequency(MHz):2600
183 base-frequency(MHz):2800
402 Specify clos min in MHz with [--min|-n]
445 clos-min:0 MHz
447 clos-desired:0 MHz
455 clos-min:0 MHz
457 clos-desired:0 MHz
598 full guaranteed frequency of 2600 MHz.
629 400 MHz.
678 observed that the high priority CPUs reached 3000 MHz compared to 2600 MHz.
[all …]
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| /linux/Documentation/devicetree/bindings/clock/ |
| A D | armada3700-periph-clock.txt | 36 0 gbe-50 50 MHz parent clock for Gigabit Ethernet
38 2 gbe-125 125 MHz parent clock for Gigabit Ethernet
39 3 gbe1-50 50 MHz clock for Gigabit Ethernet port 1
40 4 gbe0-50 50 MHz clock for Gigabit Ethernet port 0
41 5 gbe1-125 125 MHz clock for Gigabit Ethernet port 1
42 6 gbe0-125 125 MHz clock for Gigabit Ethernet port 0
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| A D | samsung,exynos850-clock.yaml | 20 two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external
65 - description: External reference clock (26 MHz)
81 - description: External reference clock (26 MHz)
105 - description: External reference clock (26 MHz)
123 - description: External reference clock (26 MHz)
147 - description: External reference clock (26 MHz)
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| /linux/Documentation/devicetree/bindings/media/i2c/ |
| A D | sony,imx412.yaml | 32 description: Clock frequency 6MHz, 12MHz, 18MHz, 24MHz or 27MHz
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| /linux/drivers/media/tuners/ |
| A D | qt1010_priv.h | 70 #define QT1010_MIN_FREQ (48 * MHz)
71 #define QT1010_MAX_FREQ (860 * MHz)
72 #define QT1010_OFFSET (1246 * MHz)
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| /linux/Documentation/devicetree/bindings/usb/ |
| A D | qcom,dwc3.yaml | 53 - description: Master/Core clock, has to be >= 125 MHz
54 for SS operation and >= 60MHz for HS operation.
57 in host mode. Its frequency should be 19.2MHz.
76 - description: Must be 19.2MHz (19200000).
77 - description: Must be >= 60 MHz in HS mode, >= 125 MHz in SS mode.
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| A D | rockchip,dwc3.yaml | 54 Controller reference clock, must to be 24 MHz
56 Controller suspend clock, must to be 24 MHz or 32 KHz
58 Master/Core clock, must to be >= 62.5 MHz for SS
59 operation and >= 30MHz for HS operation
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| /linux/Documentation/userspace-api/media/drivers/ |
| A D | max2175.rst | 53 samples/sec with a 10.24 MHz sck.
56 samples/sec with a 32.768 MHz sck.
61 samples/sec with a 14.88375 MHz sck.
64 samples/sec with a 7.441875 MHz sck.
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| /linux/Documentation/devicetree/bindings/phy/ |
| A D | qcom,qmp-phy.yaml | 136 - description: 19.2 MHz ref clk.
167 - description: 19.2 MHz ref clk.
196 - description: 19.2 MHz ref clk.
230 - description: 19.2 MHz ref clk.
257 - description: 19.2 MHz ref clk.
283 - description: 19.2 MHz ref clk.
341 - description: 19.2 MHz ref clk.
372 - description: 19.2 MHz ref clk source.
373 - description: 19.2 MHz ref clk.
404 - description: 19.2 MHz ref clk.
[all …]
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| /linux/Documentation/devicetree/bindings/regulator/ |
| A D | maxim,max8952.yaml | 62 - 0: 26 MHz
63 - 1: 13 MHz
64 - 2: 19.2 MHz
65 Defaults to 26 MHz if not specified.
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| A D | mps,mpq7920.yaml | 37 1.1MHz, 1.65MHz, 2.2MHz, 2.75MHz
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| /linux/arch/powerpc/boot/dts/ |
| A D | media5200.dts | 29 timebase-frequency = <33000000>; // 33 MHz, these were configured by U-Boot
30 bus-frequency = <132000000>; // 132 MHz
31 clock-frequency = <396000000>; // 396 MHz
40 bus-frequency = <132000000>;// 132 MHz
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| /linux/Documentation/devicetree/bindings/mips/cavium/ |
| A D | uctl.txt | 29 /* 12MHz, 24MHz and 48MHz allowed */
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| /linux/Documentation/devicetree/bindings/input/touchscreen/ |
| A D | stmpe.txt | 53 0 -> 1.625 MHz
54 1 -> 3.25 MHz
55 2 || 3 -> 6.5 MHz
79 /* 3.25 MHz ADC clock speed */
|