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Searched refs:MIPS_CPU_VEIC (Results 1 – 3 of 3) sorted by relevance

/linux/arch/mips/include/asm/
A Dcpu.h386 #define MIPS_CPU_VEIC BIT_ULL(20) /* CPU supports MIPSR2 external interrupt controller mode */ macro
A Dcpu-features.h481 # define cpu_has_veic __opt(MIPS_CPU_VEIC)
/linux/arch/mips/kernel/
A Dcpu-probe.c525 c->options |= MIPS_CPU_VEIC; in decode_config3()

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