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Searched refs:MI_BATCH_BUFFER_END (Results 1 – 20 of 20) sorted by relevance

/linux/drivers/gpu/drm/i915/selftests/
A Digt_spinner.c208 *batch++ = MI_BATCH_BUFFER_END; /* not reached */ in igt_spinner_create_request()
244 *spin->batch = MI_BATCH_BUFFER_END; in igt_spinner_end()
A Di915_request.c829 *cmd = MI_BATCH_BUFFER_END; in empty_batch()
1002 *cmd++ = MI_BATCH_BUFFER_END; /* terminate early in case of error */ in recursive_batch()
1024 *cmd = MI_BATCH_BUFFER_END; in recursive_batch_resolve()
1276 *cmd = MI_BATCH_BUFFER_END; in live_sequential_engines()
A Di915_gem_gtt.c1813 *spinner(batch, i) = MI_BATCH_BUFFER_END; in end_spin()
1867 memset32(batch, MI_BATCH_BUFFER_END, PAGE_SIZE / sizeof(u32)); in igt_cs_tlb()
/linux/drivers/gpu/drm/i915/gt/
A Dselftest_engine_cs.c84 cs[0] = MI_BATCH_BUFFER_END; in create_empty_batch()
221 cs[SZ_64K / sizeof(*cs) - 1] = MI_BATCH_BUFFER_END; in create_nop_batch()
A Dselftest_lrc.c216 } while (!err && (lrc[dw] & ~BIT(0)) != MI_BATCH_BUFFER_END); in live_lrc_layout()
965 (hw[dw] & ~BIT(0)) != MI_BATCH_BUFFER_END); in store_context()
967 *cs++ = MI_BATCH_BUFFER_END; in store_context()
1125 (hw[dw] & ~BIT(0)) != MI_BATCH_BUFFER_END); in load_context()
1127 *cs++ = MI_BATCH_BUFFER_END; in load_context()
1279 (hw[dw] & ~BIT(0)) != MI_BATCH_BUFFER_END); in compare_isolation()
A Dintel_renderstate.c122 OUT_BATCH(d, i, MI_BATCH_BUFFER_END); in render_state_setup()
A Dselftest_ring_submission.c56 *cs++ = MI_BATCH_BUFFER_END; in create_wally()
A Dintel_gpu_commands.h59 #define MI_BATCH_BUFFER_END MI_INSTR(0x0a, 0) macro
A Dselftest_hangcheck.c238 *batch++ = MI_BATCH_BUFFER_END; /* not reached */ in hang_create_request()
273 *h->batch = MI_BATCH_BUFFER_END; in hang_fini()
329 *h.batch = MI_BATCH_BUFFER_END; in igt_hang_sanitycheck()
1771 *h.batch = MI_BATCH_BUFFER_END; in igt_reset_queue()
A Dgen7_renderclear.c427 batch_add(&cmds, MI_BATCH_BUFFER_END); in emit_batch()
A Dselftest_rps.c716 *cancel = MI_BATCH_BUFFER_END; in live_rps_frequency_cs()
856 *cancel = MI_BATCH_BUFFER_END; in live_rps_frequency_srm()
A Dselftest_workarounds.c615 *cs++ = MI_BATCH_BUFFER_END; in check_dirty_whitelist()
928 *cs++ = MI_BATCH_BUFFER_END; in scrub_whitelisted_registers()
A Dselftest_execlists.c2748 *cs++ = MI_BATCH_BUFFER_END; in create_gang()
3109 *cs++ = MI_BATCH_BUFFER_END; in create_gpr_user()
3675 cs[n] = MI_BATCH_BUFFER_END; in live_preempt_smoke()
A Dintel_lrc.c72 *regs = MI_BATCH_BUFFER_END; in set_offsets()
/linux/drivers/gpu/drm/i915/gem/selftests/
A Digt_gem_utils.c86 *cmd = MI_BATCH_BUFFER_END; in igt_emit_store_dw()
A Di915_gem_context.c900 *cmd = MI_BATCH_BUFFER_END; in rpcs_query_batch()
1519 *cmd = MI_BATCH_BUFFER_END; in write_to_scratch()
1630 *cmd = MI_BATCH_BUFFER_END; in read_from_scratch()
1664 *cmd = MI_BATCH_BUFFER_END; in read_from_scratch()
A Di915_gem_client_blt.c106 *cs++ = MI_BATCH_BUFFER_END; in prepare_blit()
A Di915_gem_mman.c1160 bbe = MI_BATCH_BUFFER_END; in __igt_mmap_gpu()
/linux/drivers/gpu/drm/i915/
A Di915_cmd_parser.c1474 if (*cmd == MI_BATCH_BUFFER_END) in intel_engine_cmd_parser()
1535 *batch_end = MI_BATCH_BUFFER_END; in intel_engine_cmd_parser()
1540 *cmd = MI_BATCH_BUFFER_END; in intel_engine_cmd_parser()
A Di915_perf.c1796 *cs++ = MI_BATCH_BUFFER_END; in alloc_noa_wait()

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