| /linux/drivers/net/ethernet/mellanox/mlx5/core/ |
| A D | fw.c | 158 if (MLX5_CAP_GEN(dev, hca_cap_2)) { in mlx5_query_hca_caps() 176 if (MLX5_CAP_GEN(dev, pg)) { in mlx5_query_hca_caps() 182 if (MLX5_CAP_GEN(dev, atomic)) { in mlx5_query_hca_caps() 188 if (MLX5_CAP_GEN(dev, roce)) { in mlx5_query_hca_caps() 220 if (MLX5_CAP_GEN(dev, qos)) { in mlx5_query_hca_caps() 226 if (MLX5_CAP_GEN(dev, debug)) in mlx5_query_hca_caps() 229 if (MLX5_CAP_GEN(dev, pcam_reg)) in mlx5_query_hca_caps() 232 if (MLX5_CAP_GEN(dev, mcam_reg)) { in mlx5_query_hca_caps() 238 if (MLX5_CAP_GEN(dev, qcam_reg)) in mlx5_query_hca_caps() 247 if (MLX5_CAP_GEN(dev, event_cap)) { in mlx5_query_hca_caps() [all …]
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| A D | vport.c | 470 if (!MLX5_CAP_GEN(mdev, vport_group_manager)) in mlx5_modify_nic_vport_node_guid() 564 if (MLX5_CAP_GEN(dev, num_ports) == 2) in mlx5_query_hca_vport_gid() 629 if (MLX5_CAP_GEN(dev, num_ports) == 2) in mlx5_query_hca_vport_pkey() 677 if (MLX5_CAP_GEN(dev, num_ports) == 2) in mlx5_query_hca_vport_context() 836 if (!MLX5_CAP_GEN(mdev, disable_local_lb_mc) && in mlx5_nic_vport_update_local_lb() 837 !MLX5_CAP_GEN(mdev, disable_local_lb_uc)) in mlx5_nic_vport_update_local_lb() 849 if (MLX5_CAP_GEN(mdev, disable_local_lb_mc)) in mlx5_nic_vport_update_local_lb() 853 if (MLX5_CAP_GEN(mdev, disable_local_lb_uc)) in mlx5_nic_vport_update_local_lb() 988 if (MLX5_CAP_GEN(dev, num_ports) == 2) in mlx5_core_query_vport_counter() 1051 if (MLX5_CAP_GEN(dev, num_ports) > 1) in mlx5_core_modify_hca_vport_context() [all …]
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| A D | en_dcbnl.c | 92 if (!MLX5_CAP_GEN(priv->mdev, dcbx)) in mlx5e_dcbnl_switch_to_host_mode() 117 if (!MLX5_CAP_GEN(priv->mdev, ets)) in mlx5e_dcbnl_ieee_getets() 326 if (!MLX5_CAP_GEN(priv->mdev, ets)) in mlx5e_dcbnl_ieee_setets() 629 if (!MLX5_CAP_GEN(mdev, ets)) in mlx5e_dcbnl_setall() 738 if (!MLX5_CAP_GEN(priv->mdev, ets)) { in mlx5e_dcbnl_getpgtccfgtx() 1025 if (MLX5_CAP_GEN(mdev, vport_group_manager) && MLX5_CAP_GEN(mdev, qos)) in mlx5e_dcbnl_build_netdev() 1034 if (MLX5_CAP_GEN(mdev, qos)) in mlx5e_dcbnl_build_rep_netdev() 1061 if (!MLX5_CAP_GEN(priv->mdev, ets)) in mlx5e_ets_init() 1219 if (!MLX5_CAP_GEN(mdev, sbcam_reg)) in mlx5e_query_port_buffers_cell_size() 1235 if (!MLX5_CAP_GEN(priv->mdev, qos)) in mlx5e_dcbnl_initialize() [all …]
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| A D | pci_irq.c | 70 min_msix = MLX5_CAP_GEN(dev, min_dynamic_vf_msix_table_size); in mlx5_get_default_msix_vec_count() 71 max_msix = MLX5_CAP_GEN(dev, max_dynamic_vf_msix_table_size); in mlx5_get_default_msix_vec_count() 100 if (!MLX5_CAP_GEN(dev, vport_group_manager) || !mlx5_core_is_pf(dev)) in mlx5_set_msix_vec_count() 103 min_msix = MLX5_CAP_GEN(dev, min_dynamic_vf_msix_table_size); in mlx5_set_msix_vec_count() 104 max_msix = MLX5_CAP_GEN(dev, max_dynamic_vf_msix_table_size); in mlx5_set_msix_vec_count() 601 int num_eqs = MLX5_CAP_GEN(dev, max_num_eqs) ? in mlx5_irq_table_create() 602 MLX5_CAP_GEN(dev, max_num_eqs) : in mlx5_irq_table_create() 603 1 << MLX5_CAP_GEN(dev, log_max_eq); in mlx5_irq_table_create() 611 pf_vec = MLX5_CAP_GEN(dev, num_ports) * num_online_cpus() + 1; in mlx5_irq_table_create()
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| A D | uar.c | 65 if (MLX5_CAP_GEN(mdev, uar_4k)) in uars_per_sys_page() 66 return MLX5_CAP_GEN(mdev, num_of_uars_per_page); in uars_per_sys_page() 75 if (MLX5_CAP_GEN(mdev, uar_4k)) in uar2pfn() 201 (1 << MLX5_CAP_GEN(mdev, log_bf_reg_size)) + MLX5_BF_OFFSET; in map_offset() 281 bf_reg_size = 1 << MLX5_CAP_GEN(dev, log_bf_reg_size); in addr_to_dbi_in_syspage()
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| A D | mlx5_core.h | 225 #define MLX5_PPS_CAP(mdev) (MLX5_CAP_GEN((mdev), pps) && \ 226 MLX5_CAP_GEN((mdev), pps_modify) && \ 255 return MLX5_CAP_GEN(dev, vport_group_manager) && in mlx5_lag_is_lacp_owner() 256 (MLX5_CAP_GEN(dev, num_lag_ports) > 1) && in mlx5_lag_is_lacp_owner() 257 MLX5_CAP_GEN(dev, lag_master); in mlx5_lag_is_lacp_owner()
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| A D | eq.c | 311 if (!param->mask[0] && MLX5_CAP_GEN(dev, log_max_uctx)) in create_map_eq() 549 if (MLX5_CAP_GEN(dev, general_notification_event)) in gather_async_events_mask() 552 if (MLX5_CAP_GEN(dev, port_module_event)) in gather_async_events_mask() 560 if (MLX5_CAP_GEN(dev, fpga)) in gather_async_events_mask() 566 if (MLX5_CAP_GEN(dev, temp_warn_event)) in gather_async_events_mask() 572 if (MLX5_CAP_GEN(dev, max_num_of_monitor_counters)) in gather_async_events_mask() 584 if (MLX5_CAP_GEN(dev, event_cap)) in gather_async_events_mask() 998 int num_eqs = MLX5_CAP_GEN(dev, max_num_eqs) ? in mlx5_eq_table_create() 999 MLX5_CAP_GEN(dev, max_num_eqs) : in mlx5_eq_table_create() 1000 1 << MLX5_CAP_GEN(dev, log_max_eq); in mlx5_eq_table_create()
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| A D | dev.c | 62 if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH) in mlx5_eth_supported() 65 if (!MLX5_CAP_GEN(dev, eth_net_offloads)) { in mlx5_eth_supported() 70 if (!MLX5_CAP_GEN(dev, nic_flow_table)) { in mlx5_eth_supported() 103 if (!MLX5_CAP_GEN(dev, cq_moderation)) in mlx5_eth_supported() 187 if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH) in is_mp_supported()
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| A D | en_ethtool.c | 518 if (!MLX5_CAP_GEN(priv->mdev, cq_moderation)) in mlx5e_ethtool_get_coalesce() 591 if (!MLX5_CAP_GEN(mdev, cq_moderation)) in mlx5e_ethtool_set_coalesce() 1469 if (MLX5_CAP_GEN(mdev, wol_g)) in mlx5e_get_wol_supported() 1472 if (MLX5_CAP_GEN(mdev, wol_s)) in mlx5e_get_wol_supported() 1475 if (MLX5_CAP_GEN(mdev, wol_a)) in mlx5e_get_wol_supported() 1478 if (MLX5_CAP_GEN(mdev, wol_b)) in mlx5e_get_wol_supported() 1481 if (MLX5_CAP_GEN(mdev, wol_m)) in mlx5e_get_wol_supported() 1484 if (MLX5_CAP_GEN(mdev, wol_u)) in mlx5e_get_wol_supported() 1487 if (MLX5_CAP_GEN(mdev, wol_p)) in mlx5e_get_wol_supported() 1670 if (!MLX5_CAP_GEN(mdev, beacon_led)) in mlx5e_set_phys_id() [all …]
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| A D | main.c | 216 if (!MLX5_CAP_GEN(dev, driver_version)) in mlx5_set_driver_version() 416 if (!MLX5_CAP_GEN(dev, atomic)) in handle_hca_cap_atomic() 446 !MLX5_CAP_GEN(dev, pg)) in handle_hca_cap_odp() 503 mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size)), in handle_hca_cap() 561 if (MLX5_CAP_GEN(dev, roce_rw_supported)) in handle_hca_cap() 583 return (MLX5_CAP_GEN(dev, roce_rw_supported) && !mlx5_is_roce_init_enabled(dev)) || in is_roce_fw_disabled() 584 (!MLX5_CAP_GEN(dev, roce_rw_supported) && !MLX5_CAP_GEN(dev, roce)); in is_roce_fw_disabled() 676 if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH) in mlx5_core_set_hca_defaults() 1705 fast_teardown = MLX5_CAP_GEN(dev, fast_teardown); in mlx5_try_fast_unload() 1706 force_teardown = MLX5_CAP_GEN(dev, force_teardown); in mlx5_try_fast_unload()
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/lib/ |
| A D | sf.h | 11 return MLX5_CAP_GEN(dev, sf_base_id); in mlx5_sf_start_function_id() 18 return MLX5_CAP_GEN(dev, sf); in mlx5_sf_supported() 25 if (MLX5_CAP_GEN(dev, max_num_sf)) in mlx5_sf_max_functions() 26 return MLX5_CAP_GEN(dev, max_num_sf); in mlx5_sf_max_functions() 28 return 1 << MLX5_CAP_GEN(dev, log_max_sf); in mlx5_sf_max_functions()
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| A D | clock.h | 38 u8 rq_ts_format_cap = MLX5_CAP_GEN(mdev, rq_ts_format); in mlx5_is_real_time_rq() 47 u8 sq_ts_format_cap = MLX5_CAP_GEN(mdev, sq_ts_format); in mlx5_is_real_time_sq()
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| /linux/drivers/infiniband/hw/mlx5/ |
| A D | main.c | 845 if (MLX5_CAP_GEN(mdev, pkv)) in mlx5_ib_query_device() 847 if (MLX5_CAP_GEN(mdev, qkv)) in mlx5_ib_query_device() 849 if (MLX5_CAP_GEN(mdev, apm)) in mlx5_ib_query_device() 851 if (MLX5_CAP_GEN(mdev, xrc)) in mlx5_ib_query_device() 863 if (MLX5_CAP_GEN(mdev, sho)) { in mlx5_ib_query_device() 952 if (MLX5_CAP_GEN(mdev, end_pad)) in mlx5_ib_query_device() 1021 if (MLX5_CAP_GEN(mdev, cd)) in mlx5_ib_query_device() 1064 MLX5_CAP_GEN(dev->mdev, in mlx5_ib_query_device() 1080 MLX5_CAP_GEN(mdev, qos)) { in mlx5_ib_query_device() 1792 MLX5_CAP_GEN(dev->mdev, in set_ucontext_resp() [all …]
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| A D | counters.c | 301 if (MLX5_CAP_GEN(dev->mdev, cc_query_allowed)) { in do_get_hw_stats() 492 if (MLX5_CAP_GEN(dev->mdev, out_of_seq_cnt)) { in mlx5_ib_fill_counters() 513 if (MLX5_CAP_GEN(dev->mdev, roce_accl)) { in mlx5_ib_fill_counters() 520 if (MLX5_CAP_GEN(dev->mdev, cc_query_allowed)) { in mlx5_ib_fill_counters() 567 if (MLX5_CAP_GEN(dev->mdev, out_of_seq_cnt)) in __mlx5_ib_alloc_counters() 570 if (MLX5_CAP_GEN(dev->mdev, retransmission_q_counters)) in __mlx5_ib_alloc_counters() 573 if (MLX5_CAP_GEN(dev->mdev, enhanced_error_q_counters)) in __mlx5_ib_alloc_counters() 576 if (MLX5_CAP_GEN(dev->mdev, roce_accl)) in __mlx5_ib_alloc_counters() 581 if (MLX5_CAP_GEN(dev->mdev, cc_query_allowed)) { in __mlx5_ib_alloc_counters() 914 if (!MLX5_CAP_GEN(dev->mdev, max_qp_cnt)) in mlx5_ib_counters_init() [all …]
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| A D | qp.c | 396 MLX5_CAP_GEN(dev->mdev, in set_rq_size() 1971 if (MLX5_CAP_GEN(mdev, ece_support)) in create_xrc_tgt_qp() 2041 if (MLX5_CAP_GEN(mdev, ece_support)) in create_dci() 2116 if (MLX5_CAP_GEN(mdev, ece_support)) in create_dci() 2212 if (MLX5_CAP_GEN(mdev, ece_support)) in create_user_qp() 2685 if (!MLX5_CAP_GEN(dev->mdev, xrc)) in check_qp_type() 2903 MLX5_CAP_GEN(mdev, sho), qp); in process_create_flags() 2908 MLX5_CAP_GEN(mdev, cd), qp); in process_create_flags() 2910 MLX5_CAP_GEN(mdev, cd), qp); in process_create_flags() 2912 MLX5_CAP_GEN(mdev, cd), qp); in process_create_flags() [all …]
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| A D | mlx5_ib.h | 1545 return lib_support && MLX5_CAP_GEN(dev->mdev, uar_4k) ? in get_uars_per_sys_page() 1572 if (MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) in mlx5_ib_can_load_pas_with_umr() 1579 if (!MLX5_CAP_GEN(dev->mdev, umr_extended_translation_offset) && in mlx5_ib_can_load_pas_with_umr() 1597 MLX5_CAP_GEN(dev->mdev, atomic) && in mlx5_ib_can_reconfig_with_umr() 1598 MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled)) in mlx5_ib_can_reconfig_with_umr() 1602 MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write) && in mlx5_ib_can_reconfig_with_umr() 1603 !MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write_umr)) in mlx5_ib_can_reconfig_with_umr() 1607 MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read) && in mlx5_ib_can_reconfig_with_umr() 1608 !MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read_umr)) in mlx5_ib_can_reconfig_with_umr() 1642 (MLX5_CAP_GEN(dev->mdev, num_lag_ports) > 1 && in mlx5_ib_lag_should_assign_affinity() [all …]
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| A D | cq.c | 697 if (MLX5_CAP_GEN(dev->mdev, mini_cqe_resp_stride_index)) in mini_cqe_res_format_to_hw() 794 MLX5_CAP_GEN(dev->mdev, cqe_compression_128)) || in create_cq_user() 796 MLX5_CAP_GEN(dev->mdev, cqe_compression)))) { in create_cq_user() 819 !MLX5_CAP_GEN(dev->mdev, cqe_128_always)) { in create_cq_user() 952 (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)))) in mlx5_ib_create_cq() 959 if (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz))) in mlx5_ib_create_cq() 1128 if (!MLX5_CAP_GEN(dev->mdev, cq_moderation)) in mlx5_ib_modify_cq() 1267 if (!MLX5_CAP_GEN(dev->mdev, cq_resize)) { in mlx5_ib_resize_cq() 1273 entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz))) { in mlx5_ib_resize_cq() 1276 1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)); in mlx5_ib_resize_cq() [all …]
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/en/ |
| A D | monitor_stats.c | 27 if (!MLX5_CAP_GEN(mdev, max_num_of_monitor_counters)) in mlx5e_monitor_counter_supported() 30 MLX5_CAP_GEN(mdev, num_ppcnt_monitor_counters) < in mlx5e_monitor_counter_supported() 33 if (MLX5_CAP_GEN(mdev, num_q_monitor_counters) < in mlx5e_monitor_counter_supported() 103 int max_num_of_counters = MLX5_CAP_GEN(mdev, max_num_of_monitor_counters); in mlx5e_set_monitor_counter() 104 int num_q_counters = MLX5_CAP_GEN(mdev, num_q_monitor_counters); in mlx5e_set_monitor_counter() 106 MLX5_CAP_GEN(mdev, num_ppcnt_monitor_counters); in mlx5e_set_monitor_counter()
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/steering/ |
| A D | dr_cmd.c | 116 caps->eswitch_manager = MLX5_CAP_GEN(mdev, eswitch_manager); in mlx5dr_cmd_query_device() 117 caps->gvmi = MLX5_CAP_GEN(mdev, vhca_id); in mlx5dr_cmd_query_device() 121 if (MLX5_CAP_GEN(mdev, roce)) { in mlx5dr_cmd_query_device() 133 caps->isolate_vl_tc = MLX5_CAP_GEN(mdev, isolate_vl_tc_new); in mlx5dr_cmd_query_device() 142 MLX5_CAP_GEN(mdev, flex_parser_id_icmpv6_dw0); in mlx5dr_cmd_query_device() 144 MLX5_CAP_GEN(mdev, flex_parser_id_icmpv6_dw1); in mlx5dr_cmd_query_device() 149 MLX5_CAP_GEN(mdev, flex_parser_id_geneve_tlv_option_0); in mlx5dr_cmd_query_device() 161 MLX5_CAP_GEN(mdev, flex_parser_id_gtpu_dw_0); in mlx5dr_cmd_query_device() 165 MLX5_CAP_GEN(mdev, flex_parser_id_gtpu_teid); in mlx5dr_cmd_query_device() 169 MLX5_CAP_GEN(mdev, flex_parser_id_gtpu_dw_2); in mlx5dr_cmd_query_device() [all …]
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| A D | mlx5dr.h | 135 return MLX5_CAP_GEN(dev, roce) && in mlx5dr_is_supported() 138 (MLX5_CAP_GEN(dev, steering_format_version) <= in mlx5dr_is_supported()
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/ |
| A D | dev.c | 26 return MLX5_CAP_GEN(dev, sf) && mlx5_vhca_event_supported(dev); in mlx5_sf_dev_supported() 169 base_id = MLX5_CAP_GEN(table->dev, sf_base_id); in mlx5_sf_dev_state_change_handler() 209 function_id = MLX5_CAP_GEN(dev, sf_base_id); in mlx5_sf_dev_vhca_arm_all() 238 if (MLX5_CAP_GEN(dev, max_num_sf)) in mlx5_sf_dev_table_create() 239 max_sfs = MLX5_CAP_GEN(dev, max_num_sf); in mlx5_sf_dev_table_create() 241 max_sfs = 1 << MLX5_CAP_GEN(dev, log_max_sf); in mlx5_sf_dev_table_create() 242 table->sf_bar_length = 1 << (MLX5_CAP_GEN(dev, log_min_sf_size) + 12); in mlx5_sf_dev_table_create()
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ |
| A D | egress_ofld.c | 63 if (MLX5_CAP_GEN(esw->dev, prio_tag_required)) { in esw_acl_egress_ofld_rules_create() 111 if (MLX5_CAP_GEN(esw->dev, prio_tag_required)) { in esw_acl_egress_ofld_groups_create() 178 !MLX5_CAP_GEN(esw->dev, prio_tag_required)) in esw_acl_egress_ofld_setup() 188 if (MLX5_CAP_GEN(esw->dev, prio_tag_required)) in esw_acl_egress_ofld_setup() 244 fwd_dest.vport.vhca_id = MLX5_CAP_GEN(esw->dev, vhca_id); in mlx5_esw_acl_egress_vport_bond()
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/accel/ |
| A D | tls.h | 48 return MLX5_CAP_GEN(mdev, tls_tx); in mlx5_accel_is_ktls_tx() 53 return MLX5_CAP_GEN(mdev, tls_rx); in mlx5_accel_is_ktls_rx() 62 if (!MLX5_CAP_GEN(mdev, log_max_dek)) in mlx5_accel_is_ktls_device()
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| A D | ipsec_offload.h | 15 if (!MLX5_CAP_GEN(mdev, ipsec_offload)) in mlx5_is_ipsec_device() 18 if (!MLX5_CAP_GEN(mdev, log_max_dek)) in mlx5_is_ipsec_device()
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| /linux/include/linux/mlx5/ |
| A D | vport.h | 40 (MLX5_CAP_GEN(mdev, vport_group_manager) && \ 41 (MLX5_CAP_GEN(mdev, port_type) == MLX5_CAP_PORT_TYPE_ETH) && \
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