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Searched refs:MLX5_MATCH_OUTER_HEADERS (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/
A Dingress_lgcy.c35 MLX5_MATCH_OUTER_HEADERS); in esw_acl_ingress_lgcy_groups_create()
53 MLX5_MATCH_OUTER_HEADERS); in esw_acl_ingress_lgcy_groups_create()
69 MLX5_MATCH_OUTER_HEADERS); in esw_acl_ingress_lgcy_groups_create()
222 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; in esw_acl_ingress_lgcy_setup()
A Dhelper.c69 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; in esw_egress_acl_vlan_create()
107 match_criteria_enable, MLX5_MATCH_OUTER_HEADERS); in esw_acl_egress_vlan_grp_create()
A Dingress_ofld.c36 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; in esw_acl_ingress_prio_tag_create()
180 match_criteria_enable, MLX5_MATCH_OUTER_HEADERS); in esw_acl_ingress_ofld_groups_create()
/linux/drivers/net/ethernet/mellanox/mlx5/core/en/
A Dfs_tt_redirect.c66 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; in fs_udp_set_dport_flow()
178 MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS); in fs_udp_create_groups()
353 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; in fs_any_set_ethertype_flow()
445 MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS); in fs_any_create_groups()
/linux/drivers/net/ethernet/mellanox/mlx5/core/lib/
A Dfs_ttc.c209 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; in mlx5_generate_ttc_rule()
216 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; in mlx5_generate_ttc_rule()
220 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; in mlx5_generate_ttc_rule()
317 MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS); in mlx5_create_ttc_table_groups()
/linux/drivers/net/ethernet/mellanox/mlx5/core/
A Den_fs.c199 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; in __mlx5e_add_vlan_rule()
946 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; in mlx5e_add_l2_flow_rule()
952 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; in mlx5e_add_l2_flow_rule()
1002 MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS); in mlx5e_create_l2_table_groups()
1103 MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS); in __mlx5e_create_vlan_table_groups()
1115 MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS); in __mlx5e_create_vlan_table_groups()
1127 MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS); in __mlx5e_create_vlan_table_groups()
1138 MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS); in __mlx5e_create_vlan_table_groups()
A Den_arfs.c291 MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS); in arfs_create_groups()
492 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; in arfs_add_rule()
A Deswitch_offloads.c569 spec->match_criteria_enable |= MLX5_MATCH_OUTER_HEADERS; in mlx5_eswitch_add_offloaded_rule()
684 spec->match_criteria_enable |= MLX5_MATCH_OUTER_HEADERS; in mlx5_eswitch_add_fwd_rule()
1351 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; in esw_add_fdb_miss_rule()
1811 MLX5_MATCH_OUTER_HEADERS); in esw_create_offloads_fdb_tables()
A Deswitch.c187 MLX5_MATCH_OUTER_HEADERS); in __esw_fdb_set_vport_rule()
209 if (match_header & MLX5_MATCH_OUTER_HEADERS) { in __esw_fdb_set_vport_rule()
A Den_tc.c1027 spec->match_criteria_enable |= MLX5_MATCH_OUTER_HEADERS; in mlx5e_add_offloaded_nic_rule()
/linux/drivers/net/ethernet/mellanox/mlx5/core/esw/
A Dbridge.c152 MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2); in mlx5_esw_bridge_ingress_vlan_fg_create()
191 MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2); in mlx5_esw_bridge_ingress_filter_fg_create()
228 MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2); in mlx5_esw_bridge_ingress_mac_fg_create()
263 MLX5_SET(create_flow_group_in, in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS); in mlx5_esw_bridge_egress_vlan_fg_create()
296 MLX5_SET(create_flow_group_in, in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS); in mlx5_esw_bridge_egress_mac_fg_create()
542 rule_spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_esw_bridge_ingress_flow_with_esw_create()
634 rule_spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_esw_bridge_ingress_filter_flow_create()
684 rule_spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; in mlx5_esw_bridge_egress_flow_create()
A Dlegacy.c111 MLX5_MATCH_OUTER_HEADERS); in esw_create_legacy_fdb_table()
128 MLX5_MATCH_OUTER_HEADERS); in esw_create_legacy_fdb_table()
A Dindir_table.c150 rule_spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS | in mlx5_esw_indir_table_rule_get()
295 MLX5_SET(create_flow_group_in, in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS | in mlx5_create_indir_recirc_group()
/linux/drivers/net/ethernet/mellanox/mlx5/core/en_accel/
A Dfs_tcp.c91 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; in mlx5e_accel_fs_add_sk()
237 MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS); in accel_fs_tcp_create_groups()
A Dipsec_fs.c411 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS; in setup_fte_common()
/linux/drivers/net/ethernet/mellanox/mlx5/core/fpga/
A Dipsec.c613 if (!(match_criteria_enable & MLX5_MATCH_OUTER_HEADERS) || in mlx5_is_fpga_ipsec_rule()
660 ~(MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS)) || in mlx5_is_fpga_egress_ipsec_rule()
/linux/include/linux/mlx5/
A Ddevice.h1114 MLX5_MATCH_OUTER_HEADERS = 1 << 0, enumerator
/linux/drivers/vdpa/mlx5/net/
A Dmlx5_vnet.c1398 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; in add_fwd_to_tir()

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