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Searched refs:MPLL_SS2 (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/radeon/
A Drv740d.h113 #define MPLL_SS2 0x860 macro
A Drv740_dpm.c310 pi->clk_regs.rv770.mpll_ss2 = RREG32(MPLL_SS2); in rv740_read_clock_registers()
A Dnid.h690 #define MPLL_SS2 0x860 macro
A Dsid.h633 #define MPLL_SS2 0x2bd0 macro
A Dcikd.h756 #define MPLL_SS2 0x2bd0 macro
A Devergreend.h228 #define MPLL_SS2 0x860 macro
A Dni_dpm.c1196 ni_pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); in ni_read_clock_registers()
A Dci_dpm.c1857 pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); in ci_read_clock_registers()
A Dsi_dpm.c3566 si_pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); in si_read_clock_registers()
/linux/drivers/gpu/drm/amd/amdgpu/
A Dsid.h634 #define MPLL_SS2 0xAF4 macro
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
A Diceland_smumgr.c1141 mpll_ss2 = PHM_SET_FIELD(mpll_ss2, MPLL_SS2, CLKS, clks); in iceland_calculate_mclk_params()
A Dci_smumgr.c1092 mpll_ss2 = PHM_SET_FIELD(mpll_ss2, MPLL_SS2, CLKS, clks); in ci_calculate_mclk_params()
A Dtonga_smumgr.c893 mpll_ss2 = PHM_SET_FIELD(mpll_ss2, MPLL_SS2, CLKS, clks); in tonga_calculate_mclk_params()
/linux/drivers/gpu/drm/amd/pm/powerplay/
A Dsi_dpm.c4025 si_pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); in si_read_clock_registers()

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