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Searched refs:MSR_IA32_L3_CBM_BASE (Results 1 – 2 of 2) sorted by relevance

/linux/arch/x86/kernel/cpu/resctrl/
A Dcore.c77 .msr_base = MSR_IA32_L3_CBM_BASE,
135 if (wrmsr_safe(MSR_IA32_L3_CBM_BASE, max_cbm, 0)) in cache_alloc_hsw_probe()
138 rdmsr(MSR_IA32_L3_CBM_BASE, l, h); in cache_alloc_hsw_probe()
A Dinternal.h13 #define MSR_IA32_L3_CBM_BASE 0xc90 macro

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