Searched refs:MSYSINT1REG (Results 1 – 1 of 1) sorted by relevance

/linux/arch/mips/vr41xx/common/
A D	icu.c	54 #define MSYSINT1REG 0x0c macro 434 icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(d->irq)); in disable_sysint1_irq() 439 icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(d->irq)); in enable_sysint1_irq() 619 mask1 = icu1_read(MSYSINT1REG); in icu_get_irq() 693 icu1_write(MSYSINT1REG, 0); in vr41xx_icu_init()

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