Searched refs:MX6QDL_PAD_EIM_A25__GPIO5_IO02 (Results 1 – 22 of 22) sorted by relevance
18 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x0f0b0 /* WL_RST_N */
121 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b0 /* LCD_nRESET */
333 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0
379 fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>;
321 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* LED1 */
428 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0
75 #define MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x088 0x39c 0x000 0x5 0x0 macro
486 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* user led0 */
576 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x4001b0b1 /* DIO20 */
459 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0 /* Q7[185] GPIO0 */
329 #define MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x134 0x504 0x000 0x5 0x0 macro
539 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b1
676 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b0
331 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0 /*LCD power*/
453 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b1 /* SS1# */
695 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b0
610 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0
666 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b0
432 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x000b1
380 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* PWR BTN */
677 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0
1097 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0
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