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Searched refs:M_SCD_TIMER_ENABLE (Results 1 – 4 of 4) sorted by relevance

/linux/arch/mips/kernel/
A Dcevt-bcm1480.c41 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, cfg); in sibyte_set_periodic()
67 __raw_writeq(M_SCD_TIMER_ENABLE, cfg); in sibyte_next_event()
80 tmode = M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS; in sibyte_counter_handler()
A Dcevt-sb1250.c51 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, cfg); in sibyte_set_periodic()
66 __raw_writeq(M_SCD_TIMER_ENABLE, cfg); in sibyte_next_event()
79 tmode = M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS; in sibyte_counter_handler()
A Dcsrc-sb1250.c64 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, in sb1250_clocksource_init()
/linux/arch/mips/include/asm/sibyte/
A Dsb1250_scd.h363 #define M_SCD_TIMER_ENABLE _SB_MAKEMASK1(0) macro

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