| /linux/Documentation/admin-guide/mm/damon/ |
| A D | start.rst | 56 access two 100 MiB sized memory regions one by one. You can substitute this
83 # x-axis: space (139728247021568-139728453431248: 196.848 MiB)
85 # resolution: 80x40 (2.461 MiB and 1.758 s for each character)
93 # avr: 107.708 MiB
95 10 95.328 MiB |**************************** |
96 20 95.332 MiB |**************************** |
97 30 95.340 MiB |**************************** |
98 40 95.387 MiB |**************************** |
99 50 95.387 MiB |**************************** |
100 60 95.398 MiB |**************************** |
[all …]
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| /linux/arch/arm/boot/dts/ |
| A D | armada-385-linksys-caiman.dts | 75 /* 128MiB */
83 reg = <0x0000000 0x200000>; /* 2MiB */
99 reg = <0x900000 0x100000>; /* 1MiB */
106 reg = <0xa00000 0x2800000>; /* 40MiB */
111 reg = <0x1000000 0x2200000>; /* 34MiB */
117 reg = <0x3200000 0x2800000>; /* 40MiB */
122 reg = <0x3800000 0x2200000>; /* 34MiB */
126 * 38MiB, last MiB is for the BBT, not writable
141 reg = <0x280000 0x680000>; /* 6.5MiB */
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| A D | armada-385-linksys-cobra.dts | 75 /* 128MiB */
83 reg = <0x0000000 0x200000>; /* 2MiB */
99 reg = <0x900000 0x100000>; /* 1MiB */
106 reg = <0xa00000 0x2800000>; /* 40MiB */
111 reg = <0x1000000 0x2200000>; /* 34MiB */
117 reg = <0x3200000 0x2800000>; /* 40MiB */
122 reg = <0x3800000 0x2200000>; /* 34MiB */
126 * 38MiB, last MiB is for the BBT, not writable
141 reg = <0x280000 0x680000>; /* 6.5MiB */
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| A D | armada-385-linksys-shelby.dts | 75 /* 128MiB */
83 reg = <0x0000000 0x200000>; /* 2MiB */
99 reg = <0x900000 0x100000>; /* 1MiB */
106 reg = <0xa00000 0x2800000>; /* 40MiB */
111 reg = <0x1000000 0x2200000>; /* 34MiB */
117 reg = <0x3200000 0x2800000>; /* 40MiB */
122 reg = <0x3800000 0x2200000>; /* 34MiB */
126 * 38MiB, last MiB is for the BBT, not writable
141 reg = <0x280000 0x680000>; /* 6.5MiB */
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| A D | armada-385-linksys-rango.dts | 83 /* AMD/Spansion S34ML02G2 256MiB, OEM Layout */
91 reg = <0x0000000 0x200000>; /* 2MiB */
120 reg = <0xa00000 0x5000000>; /* 80MiB */
125 reg = <0x1000000 0x4a00000>; /* 74MiB */
131 reg = <0x5a00000 0x5000000>; /* 80MiB */
136 reg = <0x6000000 0x4a00000>; /* 74MiB */
140 * 86MiB, last MiB is for the BBT, not writable
155 reg = <0x260000 0x5c0000>; /* 5.75MiB */
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| A D | armada-370-dlink-dns327l.dts | 30 reg = <0x00000000 0x20000000>; /* 512 MiB */
286 /* 1.0 MiB */
300 /* 7 MiB */
306 /* ~ 84 MiB */
313 /* 5 MiB */
319 /* 29 MiB */
325 /* 1 MiB for BBT */
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| A D | nuvoton-wpcm450-supermicro-x9sci-ln4f.dts | 6 /* The last 16 MiB are dedicated to the GPU */
21 reg = <0 0x08000000>; /* 128 MiB */
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| A D | armada-385-linksys.dtsi | 23 reg = <0x00000000 0x20000000>; /* 512 MiB */
142 /* 128MiB or 256MiB */
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| A D | gemini.dtsi | 317 /* 1MiB I/O space 0x50000000-0x500fffff */
319 /* 128MiB non-prefetchable memory 0x58000000-0x5fffffff */
324 /* 128MiB at 0x00000000-0x07ffffff */
326 /* 64MiB at 0x00000000-0x03ffffff */
328 /* 64MiB at 0x00000000-0x03ffffff */
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| A D | lpc4350-hitex-eval.dts | 381 reg = <0x040000 0x2C0000>; /* 2.75 MiB */
386 reg = <0x300000 0x100000>; /* 1 MiB */
467 reg = <0x040000 0x2c0000>; /* 2.75 MiB */
472 reg = <0x300000 0x500000>; /* 5 MiB */
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| A D | r7s9210-rza2mevb.dts | 7 * As upstream Linux does not support XIP, it cannot run in 8 MiB of HyperRAM.
8 * Hence the 64 MiB of SDRAM on the sub-board needs to be enabled, which has
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| /linux/drivers/mtd/ |
| A D | ssfdc.c | 43 #define MiB(x) ( KiB(x) * 1024L ) macro
63 { MiB( 1), 125, 4, 4 },
64 { MiB( 2), 125, 4, 8 },
65 { MiB( 4), 250, 4, 8 },
66 { MiB( 8), 250, 4, 16 },
67 { MiB( 16), 500, 4, 16 },
68 { MiB( 32), 500, 8, 16 },
69 { MiB( 64), 500, 8, 32 },
70 { MiB(128), 500, 16, 32 },
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| /linux/Documentation/filesystems/ext4/ |
| A D | blocks.rst | 54 - 8MiB
55 - 32MiB
56 - 128MiB
116 - 8MiB
117 - 32MiB
118 - 128MiB
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| /linux/Documentation/devicetree/bindings/pci/ |
| A D | faraday,ftpci100.yaml | 21 The plain variant has 128MiB of non-prefetchable memory space, whereas the
22 "dual" variant has 64MiB. Take this into account when describing the ranges.
135 ranges = /* 1MiB I/O space 0x50000000-0x500fffff */
137 /* 128MiB non-prefetchable memory 0x58000000-0x5fffffff */
142 /* 128MiB at 0x00000000-0x07ffffff */
144 /* 64MiB at 0x00000000-0x03ffffff */
146 /* 64MiB at 0x00000000-0x03ffffff */
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| A D | v3-v360epc-pci.txt | 44 0x60000000 0 0x01000000 /* 16 MiB @ LB 60000000 */
46 0x40000000 0 0x10000000 /* 256 MiB @ LB 40000000 1:1 */
48 0x50000000 0 0x10000000>; /* 256 MiB @ LB 50000000 1:1 */
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| /linux/Documentation/translations/zh_CN/virt/ |
| A D | ne_overview.rst | 48 从主虚拟机中分割出来并给enclave的内存区域需要对齐2 MiB/1 GiB物理连续的内存
49 区域（或这个大小的倍数，如8 MiB）。该内存可以通过使用hugetlbfs从用户空间分
50 配[2][3]。一个enclave的内存大小需要至少64 MiB。enclave内存和CPU需要来自同
75 enclave镜像（EIF）被加载到enclave内存中，偏移量为8 MiB。enclave中的初始进程
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| /linux/Documentation/admin-guide/ |
| A D | ldm.rst | 13 1MiB journalled database at the end of the physical disk. The size of
39 Below we have a 50MiB disk, divided into seven partitions.
43 The missing 1MiB at the end of the disk is where the LDM database is
47 |Device || Offset Bytes | Sectors | MiB || Size Bytes | Sectors | MiB|
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| /linux/tools/perf/arch/x86/util/ |
| A D | intel-bts.c | 29 #define MiB(x) ((x) * 1024 * 1024) macro
31 #define MiB_MASK(x) (MiB(x) - 1)
154 opts->auxtrace_mmap_pages = MiB(4) / page_size; in intel_bts_recording_options()
191 opts->auxtrace_mmap_pages = MiB(4) / page_size; in intel_bts_recording_options()
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| /linux/Documentation/virt/ |
| A D | ne_overview.rst | 47 be aligned 2 MiB / 1 GiB physically contiguous memory regions (or multiple of
48 this size e.g. 8 MiB). The memory can be allocated e.g. by using hugetlbfs from
50 64 MiB. The enclave memory and CPUs need to be from the same NUMA node.
82 The enclave image (EIF) is loaded in the enclave memory at offset 8 MiB. The
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| A D | mvebu-devbus.txt | 109 An example for an Armada XP GP board, with a 16 MiB NOR device as child
115 will start at base address 0xf0000000, with a size 0x1000000 (16 MiB)
157 /* 16 MiB */
164 * We split the 16 MiB in two partitions,
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| /linux/arch/mips/boot/dts/ingenic/ |
| A D | gcw0_proto.dts | 11 /* Prototype has only 256 MiB of RAM */
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| /linux/arch/arm/boot/compressed/ |
| A D | head-sharpsl.S | 69 cmp r3, #0x76 @ 64MiB flash
80 cmp r3, #0x73 @ 16MiB flash
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| /linux/tools/perf/arch/arm64/util/ |
| A D | arm-spe.c | 29 #define MiB(x) ((x) * 1024 * 1024) macro
110 opts->auxtrace_mmap_pages = MiB(4) / page_size; in arm_spe_snapshot_resolve_auxtrace_defaults()
203 opts->auxtrace_mmap_pages = MiB(4) / page_size; in arm_spe_recording_options()
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| /linux/scripts/ |
| A D | xz_wrap.sh | 23 exec $XZ --check=crc32 $BCJ --lzma2=$LZMA2OPTS,dict=32MiB
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| /linux/Documentation/arm/ |
| A D | booting.rst | 142 A safe location is just above the 128MiB boundary from start of RAM.
158 be loaded just above the 128MiB boundary from the start of RAM as
175 kernel should be placed in the first 128MiB of RAM. It is recommended
176 that it is loaded above 32MiB in order to avoid the need to relocate
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