Searched refs:OP2 (Results 1 – 7 of 7) sorted by relevance
| /linux/arch/arm/kernel/ |
| A D | hw_breakpoint.c | 49 case ((OP2 << 4) + M): \
54 case ((OP2 << 4) + M): \
59 READ_WB_REG_CASE(OP2, 0, VAL); \
60 READ_WB_REG_CASE(OP2, 1, VAL); \
61 READ_WB_REG_CASE(OP2, 2, VAL); \
62 READ_WB_REG_CASE(OP2, 3, VAL); \
63 READ_WB_REG_CASE(OP2, 4, VAL); \
64 READ_WB_REG_CASE(OP2, 5, VAL); \
65 READ_WB_REG_CASE(OP2, 6, VAL); \
74 READ_WB_REG_CASE(OP2, 15, VAL)
[all …]
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| /linux/arch/arm/include/asm/ |
| A D | hw_breakpoint.h | 109 #define ARM_DBG_READ(N, M, OP2, VAL) do {\ argument
110 asm volatile("mrc p14, 0, %0, " #N "," #M ", " #OP2 : "=r" (VAL));\
113 #define ARM_DBG_WRITE(N, M, OP2, VAL) do {\ argument
114 asm volatile("mcr p14, 0, %0, " #N "," #M ", " #OP2 : : "r" (VAL));\
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| /linux/fs/afs/ |
| A D | internal.h | 1709 #define ASSERTRANGE(L, OP1, N, OP2, H) \ argument
1711 if (unlikely(!((L) OP1 (N)) || !((N) OP2 (H)))) { \
1714 printk(KERN_ERR "%lu "#OP1" %lu "#OP2" %lu is false\n", \
1717 printk(KERN_ERR "0x%lx "#OP1" 0x%lx "#OP2" 0x%lx is false\n", \
1756 #define ASSERTRANGE(L, OP1, N, OP2, H) \ argument
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| /linux/arch/arm64/include/uapi/asm/ |
| A D | kvm.h | 237 ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
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| /linux/tools/arch/arm64/include/uapi/asm/ |
| A D | kvm.h | 237 ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
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| /linux/arch/sparc/net/ |
| A D | bpf_jit_comp_32.c | 29 #define OP2(X) ((X) << 22) macro
33 #define F2(X, Y) (OP(X) | OP2(Y))
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| A D | bpf_jit_comp_64.c | 58 #define OP2(X) ((X) << 22) macro
63 #define F2(X, Y) (OP(X) | OP2(Y))
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