Searched refs:Op1 (Results 1 – 6 of 6) sorted by relevance
| /linux/arch/arm64/kvm/ |
| A D | sys_regs.c | 217 switch (p->Op1) { in access_gic_sgi()
1396 Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
1966 { Op1( 0), CRm( 1), .access = trap_raz_wi },
1969 { Op1( 0), CRm( 2), .access = trap_raz_wi },
1975 { Op1(0), CRn(0b1110), \
1982 { Op1(0), CRn(0b1110), \
1992 { Op1( 0), CRn( 0), CRm( 0), Op2( 1), access_ctr },
2131 { Op1(1), CRn( 0), CRm( 0), Op2(1), access_clidr },
2270 params.Op1 = (esr >> 16) & 0xf; in kvm_handle_cp_64()
2320 params.Op1 = (esr >> 14) & 0x7; in kvm_handle_cp_32()
[all …]
|
| A D | sys_regs.h | 17 sys_reg((u32)(x)->Op0, (u32)(x)->Op1, \
22 u8 Op1; member
32 .Op1 = ((esr) >> 14) & 0x7, \
50 u8 Op1; member
93 p->Op0, p->Op1, p->CRn, p->CRm, p->Op2, p->is_write ? "write" : "read"); in print_sys_reg_msg()
160 if (i1->Op1 != i2->Op1) in cmp_sys_reg()
161 return i1->Op1 - i2->Op1; in cmp_sys_reg()
193 #define Op1(_x) .Op1 = _x macro
200 Op0(sys_reg_Op0(reg)), Op1(sys_reg_Op1(reg)), \
|
| A D | trace_handle_exit.h | 169 __field(u8, Op1)
181 __entry->Op1 = reg->Op1;
189 __entry->Op0, __entry->Op1, __entry->CRn,
|
| /linux/arch/arm/include/asm/vdso/ |
| A D | cp15.h | 14 #define __ACCESS_CP15(CRn, Op1, CRm, Op2) \ argument
15 "mrc", "mcr", __stringify(p15, Op1, %0, CRn, CRm, Op2), u32
16 #define __ACCESS_CP15_64(Op1, CRm) \ argument
17 "mrrc", "mcrr", __stringify(p15, Op1, %Q0, %R0, CRm), u64
|
| /linux/Documentation/arm64/ |
| A D | cpu-feature-registers.rst | 95 Op0=3, Op1=0, CRn=0, CRm=0,4,5,6,7
|
| /linux/Documentation/virt/kvm/devices/ |
| A D | arm-vgic-v3.rst | 190 | Op 0 | Op1 | CRn | CRm | Op2 |
|
Completed in 14 milliseconds