Searched refs:PACKET3_SET_CONTEXT_REG_START (Results 1 – 18 of 18) sorted by relevance
263 #define PACKET3_SET_CONTEXT_REG_START 0x000a000 macro
289 #define PACKET3_SET_CONTEXT_REG_START 0x0000a000 macro
322 #define PACKET3_SET_CONTEXT_REG_START 0x0000a000 macro
343 #define PACKET3_SET_CONTEXT_REG_START 0x0000a000 macro
461 #define PACKET3_SET_CONTEXT_REG_START 0x0000a000 macro
2561 amdgpu_ring_write(ring, ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_cp_gfx_start()2569 amdgpu_ring_write(ring, mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_cp_gfx_start()4009 buffer[count++] = cpu_to_le32(ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_get_csb_buffer()4019 buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_get_csb_buffer()
1849 #define PACKET3_SET_CONTEXT_REG_START 0x000a000 macro
1277 PACKET3_SET_CONTEXT_REG_START); in gfx_v8_0_get_csb_buffer()1288 PACKET3_SET_CONTEXT_REG_START); in gfx_v8_0_get_csb_buffer()4216 ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v8_0_cp_gfx_start()4224 amdgpu_ring_write(ring, mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v8_0_cp_gfx_start()
2063 amdgpu_ring_write(ring, ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v6_0_cp_gfx_start()2907 buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v6_0_get_csb_buffer()
4416 PACKET3_SET_CONTEXT_REG_START); in gfx_v10_0_get_csb_buffer()4426 SOC15_REG_OFFSET(GC, 0, mmPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START; in gfx_v10_0_get_csb_buffer()6245 PACKET3_SET_CONTEXT_REG_START); in gfx_v10_0_cp_gfx_start()6253 SOC15_REG_OFFSET(GC, 0, mmPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START; in gfx_v10_0_cp_gfx_start()
1780 PACKET3_SET_CONTEXT_REG_START); in gfx_v9_0_get_csb_buffer()3298 ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v9_0_cp_gfx_start()
2317 start_reg = (idx_value << 2) + PACKET3_SET_CONTEXT_REG_START; in evergreen_packet3_check()2319 if ((start_reg < PACKET3_SET_CONTEXT_REG_START) || in evergreen_packet3_check()2628 allowed_reg_base -= PACKET3_SET_CONTEXT_REG_START; in evergreen_packet3_check()3503 allowed_reg_base -= PACKET3_SET_CONTEXT_REG_START; in evergreen_vm_packet3_check()
1273 #define PACKET3_SET_CONTEXT_REG_START 0x00028000 macro
1786 #define PACKET3_SET_CONTEXT_REG_START 0x00028000 macro
1929 #define PACKET3_SET_CONTEXT_REG_START 0x00028000 macro
1669 #define PACKET3_SET_CONTEXT_REG_START 0x00028000 macro
5743 buffer[count++] = cpu_to_le32(PA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in si_get_csb_buffer()
6732 buffer[count++] = cpu_to_le32(PA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in cik_get_csb_buffer()
Completed in 143 milliseconds