Searched refs:PCC0 (Results 1 – 3 of 3) sorted by relevance
| /linux/arch/sh/kernel/cpu/sh3/ |
| A D | setup-sh770x.c | 30 LCDC, PCC0, PCC1, enumerator
63 INTC_VECT(PCC0, 0x9c0), INTC_VECT(PCC1, 0x9e0),
83 { 0xa400001c, 0, 16, 4, /* IPRF */ { 0, LCDC, PCC0, PCC1, } },
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| /linux/Documentation/devicetree/bindings/clock/ |
| A D | imx7ulp-scg-clock.yaml | 23 M4 clock management consists of SCG0, PCC0, PCC1, and CMC0 modules.
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| A D | imx7ulp-pcc-clock.yaml | 23 M4 clock management consists of SCG0, PCC0, PCC1, and CMC0 modules.
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