Searched refs:PCI_BRIDGE_CTL_BUS_RESET (Results 1 – 10 of 10) sorted by relevance
57 bridge_ctl |= PCI_BRIDGE_CTL_BUS_RESET; in adf_reset_sbr()60 bridge_ctl &= ~PCI_BRIDGE_CTL_BUS_RESET; in adf_reset_sbr()
239 val |= PCI_BRIDGE_CTL_BUS_RESET; in hl_pci_reset_link_through_bridge()243 val &= ~(PCI_BRIDGE_CTL_BUS_RESET); in hl_pci_reset_link_through_bridge()
184 ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET; in ls_pcie_g4_reset()
785 val |= PCI_BRIDGE_CTL_BUS_RESET << 16; in advk_pci_bridge_emul_base_conf_read()787 val &= ~(PCI_BRIDGE_CTL_BUS_RESET << 16); in advk_pci_bridge_emul_base_conf_read()809 if (mask & (PCI_BRIDGE_CTL_BUS_RESET << 16)) { in advk_pci_bridge_emul_base_conf_write()811 if (new & (PCI_BRIDGE_CTL_BUS_RESET << 16)) in advk_pci_bridge_emul_base_conf_write()
159 PCI_BRIDGE_CTL_BUS_RESET |
5015 ctrl |= PCI_BRIDGE_CTL_BUS_RESET; in pci_reset_secondary_bus()5024 ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET; in pci_reset_secondary_bus()
303 status &= ~(PCI_BRIDGE_CTL_BUS_RESET|PCI_BRIDGE_CTL_FAST_BACK); in pcibios_fixup_bus()
825 ctrl |= PCI_BRIDGE_CTL_BUS_RESET; in __pnv_eeh_bridge_reset()832 ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET; in __pnv_eeh_bridge_reset()
166 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */ macro
1319 pci_bctl |= PCI_BRIDGE_CTL_BUS_RESET; in stex_hard_reset()1327 pci_bctl &= ~PCI_BRIDGE_CTL_BUS_RESET; in stex_hard_reset()
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