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Searched refs:PCLK_GPIO0 (Results 1 – 25 of 27) sorted by relevance

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/linux/include/dt-bindings/clock/
A Drk3036-cru.h60 #define PCLK_GPIO0 320 macro
A Drk3188-cru-common.h93 #define PCLK_GPIO0 341 macro
A Drk3128-cru.h93 #define PCLK_GPIO0 320 macro
A Drk3228-cru.h93 #define PCLK_GPIO0 320 macro
A Drk3288-cru.h112 #define PCLK_GPIO0 320 macro
A Drk3308-cru.h194 #define PCLK_GPIO0 215 macro
A Drk3328-cru.h131 #define PCLK_GPIO0 200 macro
A Drk3368-cru.h107 #define PCLK_GPIO0 320 macro
A Drk3568-cru.h59 #define PCLK_GPIO0 46 macro
/linux/drivers/clk/rockchip/
A Dclk-rk3036.c423 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 9, GFLAGS),
A Dclk-rk3128.c520 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 9, GFLAGS),
A Dclk-rk3228.c609 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 8, GFLAGS),
A Dclk-rk3188.c498 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_cpu", 0, RK2928_CLKGATE_CON(8), 9, GFLAGS),
A Dclk-rk3328.c779 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_bus", 0, RK3328_CLKGATE_CON(16), 7, GFLAGS),
A Dclk-rk3368.c828 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_pd_pmu", 0, RK3368_CLKGATE_CON(23), 4, GFLAGS),
A Dclk-rk3288.c781 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_pd_pmu", 0, RK3288_CLKGATE_CON(17), 4, GFLAGS),
A Dclk-rk3308.c882 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 12, GFLAGS),
A Dclk-rk3568.c1494 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_pdpmu", 0,
/linux/arch/arm/boot/dts/
A Drk3188.dtsi230 clocks = <&cru PCLK_GPIO0>;
A Drk3066a.dtsi279 clocks = <&cru PCLK_GPIO0>;
A Drk3036.dtsi582 clocks = <&cru PCLK_GPIO0>;
A Drk322x.dtsi953 clocks = <&cru PCLK_GPIO0>;
/linux/arch/arm64/boot/dts/rockchip/
A Drk356x.dtsi1092 clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
A Drk3368.dtsi981 clocks = <&cru PCLK_GPIO0>;
A Drk3308.dtsi797 clocks = <&cru PCLK_GPIO0>;

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