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Searched refs:PCLK_SPI1 (Results 1 – 25 of 26) sorted by relevance

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/linux/drivers/clk/samsung/
A Dclk-s3c2443.c260 GATE(PCLK_SPI1, "spi1", "pclk", PCLKCON, 15, 0, 0),
268 ALIAS(PCLK_SPI1, "s3c2410-spi.0", "spi"),
301 GATE(PCLK_SPI1, "spi1", "pclk", PCLKCON, 14, 0, 0),
305 ALIAS(PCLK_SPI1, "s3c2443-spi.1", "spi"),
306 ALIAS(PCLK_SPI1, "s3c2443-spi.1", "spi_busclk0"),
A Dclk-s3c64xx.c223 GATE_BUS(PCLK_SPI1, "pclk_spi1", "pclk", PCLK_GATE, 22),
333 ALIAS(PCLK_SPI1, "s3c6410-spi.1", "spi"),
354 ALIAS(PCLK_SPI1, "s3c6410-spi.1", "spi_busclk0"),
A Dclk-exynos7.c763 GATE(PCLK_SPI1, "pclk_spi1", "mout_aclk_peric1_66_user",
/linux/include/dt-bindings/clock/
A Ds3c2443.h82 #define PCLK_SPI1 86 macro
A Dsamsung,s3c64xx-clock.h67 #define PCLK_SPI1 52 macro
A Dexynos7-clk.h105 #define PCLK_SPI1 13 macro
A Drk3188-cru-common.h81 #define PCLK_SPI1 329 macro
A Dpx30-cru.h165 #define PCLK_SPI1 342 macro
A Drk3288-cru.h131 #define PCLK_SPI1 339 macro
A Drk3308-cru.h187 #define PCLK_SPI1 208 macro
A Drk3368-cru.h123 #define PCLK_SPI1 339 macro
A Drk3399-cru.h243 #define PCLK_SPI1 348 macro
A Drk3568-cru.h402 #define PCLK_SPI1 339 macro
/linux/arch/arm/boot/dts/
A Drk3xxx.dtsi461 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
A Drk3288.dtsi293 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
/linux/drivers/clk/rockchip/
A Dclk-rk3188.c521 GATE(PCLK_SPI1, "pclk_spi1", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 13, GFLAGS),
A Dclk-rk3368.c801 GATE(PCLK_SPI1, "pclk_spi1", "pclk_peri", 0, RK3368_CLKGATE_CON(19), 5, GFLAGS),
A Dclk-rk3288.c736 GATE(PCLK_SPI1, "pclk_spi1", "pclk_peri", 0, RK3288_CLKGATE_CON(6), 5, GFLAGS),
A Dclk-px30.c859 GATE(PCLK_SPI1, "pclk_spi1", "pclk_bus_pre", 0, PX30_CLKGATE_CON(15), 2, GFLAGS),
A Dclk-rk3308.c876 GATE(PCLK_SPI1, "pclk_spi1", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 5, GFLAGS),
A Dclk-rk3399.c1047 GATE(PCLK_SPI1, "pclk_spi1", "pclk_perilp1", 0, RK3399_CLKGATE_CON(23), 11, GFLAGS),
A Dclk-rk3568.c1344 GATE(PCLK_SPI1, "pclk_spi1", "pclk_bus", 0,
/linux/arch/arm64/boot/dts/rockchip/
A Drk3368.dtsi249 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
A Drk3308.dtsi376 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
A Dpx30.dtsi599 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;

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