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Searched refs:PHYRegDef (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/staging/r8188eu/hal/
A Drtl8188e_phycfg.c147 struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RFSerialRead()
246 struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RFSerialWrite()
443 pHalData->PHYRegDef[RF_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1; in phy_InitBBRFRegisterDefinition()
461 pHalData->PHYRegDef[RF_PATH_A].rfRxAFE = rOFDM0_XARxAFE; in phy_InitBBRFRegisterDefinition()
462 pHalData->PHYRegDef[RF_PATH_B].rfRxAFE = rOFDM0_XBRxAFE; in phy_InitBBRFRegisterDefinition()
463 pHalData->PHYRegDef[RF_PATH_C].rfRxAFE = rOFDM0_XCRxAFE; in phy_InitBBRFRegisterDefinition()
464 pHalData->PHYRegDef[RF_PATH_D].rfRxAFE = rOFDM0_XDRxAFE; in phy_InitBBRFRegisterDefinition()
473 pHalData->PHYRegDef[RF_PATH_A].rfTxAFE = rOFDM0_XATxAFE; in phy_InitBBRFRegisterDefinition()
474 pHalData->PHYRegDef[RF_PATH_B].rfTxAFE = rOFDM0_XBTxAFE; in phy_InitBBRFRegisterDefinition()
475 pHalData->PHYRegDef[RF_PATH_C].rfTxAFE = rOFDM0_XCTxAFE; in phy_InitBBRFRegisterDefinition()
[all …]
A Drtl8188e_rf6052.c393 pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RF6052_Config_ParaFile()
/linux/drivers/staging/rtl8192u/
A Dr819xU_phy.c131 BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[e_rfpath]; in rtl8192_phy_RFSerialRead()
215 BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[e_rfpath]; in rtl8192_phy_RFSerialWrite()
569 priv->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; in rtl8192_InitBBRFRegDef()
646 priv->PHYRegDef[RF90_PATH_A].rfRxAFE = rOFDM0_XARxAFE; in rtl8192_InitBBRFRegDef()
647 priv->PHYRegDef[RF90_PATH_B].rfRxAFE = rOFDM0_XBRxAFE; in rtl8192_InitBBRFRegDef()
648 priv->PHYRegDef[RF90_PATH_C].rfRxAFE = rOFDM0_XCRxAFE; in rtl8192_InitBBRFRegDef()
649 priv->PHYRegDef[RF90_PATH_D].rfRxAFE = rOFDM0_XDRxAFE; in rtl8192_InitBBRFRegDef()
658 priv->PHYRegDef[RF90_PATH_A].rfTxAFE = rOFDM0_XATxAFE; in rtl8192_InitBBRFRegDef()
659 priv->PHYRegDef[RF90_PATH_B].rfTxAFE = rOFDM0_XBTxAFE; in rtl8192_InitBBRFRegDef()
660 priv->PHYRegDef[RF90_PATH_C].rfTxAFE = rOFDM0_XCTxAFE; in rtl8192_InitBBRFRegDef()
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A Dr8190_rtl8256.c128 pPhyReg = &priv->PHYRegDef[eRFPath]; in phy_rf8256_config_para_file()
A Dr8192U.h933 BB_REGISTER_DEFINITION_T PHYRegDef[4]; /* Radio A/B/C/D */ member
/linux/drivers/staging/rtl8192e/rtl8192e/
A Dr8192E_phy.c97 struct bb_reg_definition *pPhyReg = &priv->PHYRegDef[eRFPath]; in _rtl92e_phy_rf_read()
154 struct bb_reg_definition *pPhyReg = &priv->PHYRegDef[eRFPath]; in _rtl92e_phy_rf_write()
392 priv->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; in _rtl92e_init_bb_rf_reg_def()
447 priv->PHYRegDef[RF90_PATH_A].rfRxAFE = rOFDM0_XARxAFE; in _rtl92e_init_bb_rf_reg_def()
448 priv->PHYRegDef[RF90_PATH_B].rfRxAFE = rOFDM0_XBRxAFE; in _rtl92e_init_bb_rf_reg_def()
449 priv->PHYRegDef[RF90_PATH_C].rfRxAFE = rOFDM0_XCRxAFE; in _rtl92e_init_bb_rf_reg_def()
450 priv->PHYRegDef[RF90_PATH_D].rfRxAFE = rOFDM0_XDRxAFE; in _rtl92e_init_bb_rf_reg_def()
457 priv->PHYRegDef[RF90_PATH_A].rfTxAFE = rOFDM0_XATxAFE; in _rtl92e_init_bb_rf_reg_def()
458 priv->PHYRegDef[RF90_PATH_B].rfTxAFE = rOFDM0_XBTxAFE; in _rtl92e_init_bb_rf_reg_def()
459 priv->PHYRegDef[RF90_PATH_C].rfTxAFE = rOFDM0_XCTxAFE; in _rtl92e_init_bb_rf_reg_def()
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A Dr8190P_rtl8256.c73 pPhyReg = &priv->PHYRegDef[eRFPath]; in rtl92e_config_rf()
A Drtl_core.h341 struct bb_reg_definition PHYRegDef[4]; member
/linux/drivers/staging/rtl8723bs/hal/
A Drtl8723b_phycfg.c98 struct bb_register_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RFSerialRead_8723B()
194 struct bb_register_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RFSerialWrite_8723B()
315 …pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from … in phy_InitBBRFRegisterDefinition()
322 pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */ in phy_InitBBRFRegisterDefinition()
323 pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; in phy_InitBBRFRegisterDefinition()
325 …pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2… in phy_InitBBRFRegisterDefinition()
326 …pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; /* wire control parameter2… in phy_InitBBRFRegisterDefinition()
329 pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; in phy_InitBBRFRegisterDefinition()
330 pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; in phy_InitBBRFRegisterDefinition()
331 pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; in phy_InitBBRFRegisterDefinition()
[all …]
A Drtl8723b_rf6052.c95 pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RF6052_Config_ParaFile()
/linux/drivers/staging/r8188eu/include/
A Drtl8188e_hal.h242 struct bb_reg_def PHYRegDef[4]; /* Radio A/B/C/D */ member
/linux/drivers/staging/rtl8723bs/include/
A Dhal_data.h309 struct bb_register_def PHYRegDef[4]; /* Radio A/B/C/D */ member

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