Searched refs:PIC32_SET (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/tty/serial/ |
| A D | pic32_uart.c | 78 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), in pic32_uart_set_mctrl()
158 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_STA), in pic32_uart_start_tx()
184 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_STA), in pic32_uart_break_ctl()
368 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_STA), in pic32_uart_en_and_unmask()
370 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), in pic32_uart_en_and_unmask()
543 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), in pic32_uart_set_termios()
552 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), in pic32_uart_set_termios()
557 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), in pic32_uart_set_termios()
570 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), in pic32_uart_set_termios()
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| /linux/drivers/rtc/ |
| A D | rtc-pic32.c | 106 base + (enabled ? PIC32_SET(PIC32_RTCALRM) : in pic32_rtc_setaie()
124 writel(freq << 8, base + PIC32_SET(PIC32_RTCALRM)); in pic32_rtc_setfreq()
125 writel(PIC32_RTCALRM_CHIME, base + PIC32_SET(PIC32_RTCALRM)); in pic32_rtc_setfreq()
278 writel(PIC32_RTCCON_RTCWREN, base + PIC32_SET(PIC32_RTCCON)); in pic32_rtc_enable()
282 writel(PIC32_RTCCON_ON, base + PIC32_SET(PIC32_RTCCON)); in pic32_rtc_enable()
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| /linux/arch/mips/include/asm/mach-pic32/ |
| A D | pic32.h | 15 #define PIC32_SET(_reg) ((_reg) + 0x08) macro
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| /linux/drivers/irqchip/ |
| A D | irq-pic32-evic.c | 64 writel(BIT(bit), evic_base + PIC32_SET(REG_INTCON)); in pic32_set_ext_polarity()
115 evic_base + PIC32_SET(REG_IPC_OFFSET + reg * 0x10)); in pic32_set_irq_priority()
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| /linux/drivers/clk/microchip/ |
| A D | clk-core.c | 108 writel(PB_DIV_ENABLE, PIC32_SET(pb->ctrl_reg)); in pbclk_enable()
258 writel(REFO_ON | REFO_OE, PIC32_SET(refo->ctrl_reg)); in roclk_enable()
524 writel(REFO_ON | REFO_DIVSW_EN, PIC32_SET(refo->ctrl_reg)); in roclk_set_rate_and_parent()
857 writel(OSC_SWEN, PIC32_SET(sclk->mux_reg)); in sclk_set_parent()
970 writel(sosc->enable_mask, PIC32_SET(sosc->enable_reg)); in sosc_clk_enable()
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| /linux/drivers/pinctrl/ |
| A D | pinctrl-pic32.c | 1819 writel(mask, bank->reg_base + PIC32_SET(TRIS_REG)); in pic32_gpio_direction_input()
1838 writel(mask, bank->reg_base + PIC32_SET(PORT_REG)); in pic32_gpio_set()
1940 writel(mask, bank->reg_base +PIC32_SET(CNPU_REG)); in pic32_pinconf_set()
1944 writel(mask, bank->reg_base + PIC32_SET(CNPD_REG)); in pic32_pinconf_set()
1952 writel(mask, bank->reg_base + PIC32_SET(ANSEL_REG)); in pic32_pinconf_set()
1956 writel(mask, bank->reg_base + PIC32_SET(ODCU_REG)); in pic32_pinconf_set()
2017 writel(BIT(PIC32_CNCON_ON), bank->reg_base + PIC32_SET(CNCON_REG)); in pic32_gpio_irq_unmask()
2038 writel(mask, bank->reg_base + PIC32_SET(CNEN_REG)); in pic32_gpio_irq_set_type()
2048 writel(mask, bank->reg_base + PIC32_SET(CNNE_REG)); in pic32_gpio_irq_set_type()
2054 writel(mask, bank->reg_base + PIC32_SET(CNEN_REG)); in pic32_gpio_irq_set_type()
[all …]
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| /linux/arch/mips/pic32/pic32mzda/ |
| A D | early_console.c | 60 uart_base + PIC32_SET(U_STA(port))); in configure_uart()
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| /linux/drivers/watchdog/ |
| A D | pic32-dmt.c | 50 writel(DMT_ON, PIC32_SET(dmt->regs + DMTCON_REG)); in dmt_enable()
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| A D | pic32-wdt.c | 111 writel(WDTCON_ON, PIC32_SET(wdt->regs + WDTCON_REG)); in pic32_wdt_start()
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