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Searched refs:PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/i915/gt/
A Dgen8_engine_cs.c21 flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH; in gen8_emit_flush_rcs()
120 flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH; in gen11_emit_flush_rcs()
209 flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH; in gen12_emit_flush_rcs()
531 PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH | in gen8_emit_fini_breadcrumb_rcs()
553 PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH | in gen11_emit_fini_breadcrumb_rcs()
627 PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH | in gen12_emit_fini_breadcrumb_rcs()
A Dgen6_engine_cs.c108 flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH; in gen6_emit_flush_rcs()
159 *cs++ = (PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH | in gen6_emit_breadcrumb_rcs()
317 flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH; in gen7_emit_flush_rcs()
355 *cs++ = (PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH | in gen7_emit_breadcrumb_rcs()
A Dintel_gpu_commands.h242 #define PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH (1<<12) /* gen6+ */ macro
A Dgen7_renderclear.c344 *cs++ = PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH | in gen7_emit_pipeline_flush()

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