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Searched refs:PL (Results 1 – 25 of 29) sorted by relevance

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/linux/mm/
A Dpercpu-stats.c160 #define PL(X) \ in percpu_stats_show() macro
167 PL(unit_size); in percpu_stats_show()
168 PL(static_size); in percpu_stats_show()
169 PL(reserved_size); in percpu_stats_show()
170 PL(dyn_size); in percpu_stats_show()
171 PL(atom_size); in percpu_stats_show()
172 PL(alloc_size); in percpu_stats_show()
175 #undef PL in percpu_stats_show()
/linux/arch/arm/mach-rda/
A DKconfig8 This enables support for the RDA Micro 8810PL SoC family.
/linux/drivers/net/ethernet/chelsio/cxgb4vf/
A Dt4vf_defs.h106 T4VF_MOD_MAP(PL, 3, PL_VF_WHOAMI, PL_VF_WHOAMI)
/linux/Documentation/devicetree/bindings/fpga/
A Dxlnx,zynqmp-pcap-fpga.yaml15 configure the Programmable Logic (PL). The configuration uses the
/linux/Documentation/devicetree/bindings/sound/
A Dxlnx,i2s.txt1 Device-Tree bindings for Xilinx I2S PL block
A Dxlnx,audio-formatter.txt1 Device-Tree bindings for Xilinx PL audio formatter
/linux/fs/isofs/
A Drock.h110 struct RR_PL_s PL; member
/linux/Documentation/misc-devices/
A Dxilinx_sdfec.rst41 - Programmable Logic (PL) initialization
54 Programmable Logic (PL) Initialization
57 For PL initialization, supporting logic loads configuration parameters for either
112 SD-FEC core is configured plus if the SD-FEC has not been configured for PL
/linux/arch/arm64/boot/dts/allwinner/
A Dsun50i-a64-olinuxino.dts193 /* VCC-PL is powered by aldo2 but we cannot add it as the RSB */
194 /* interface used to talk to the PMIC in on the PL pins */
/linux/drivers/hid/
A Dwacom_wac.c3279 case PL: in wacom_wac_irq()
3543 case PL: in wacom_setup_device_quirks()
3731 case PL: in wacom_setup_pen_input_capabilities()
4301 PL, WACOM_PL_RES, WACOM_PL_RES };
4304 PL, WACOM_PL_RES, WACOM_PL_RES };
4307 PL, WACOM_PL_RES, WACOM_PL_RES };
4310 PL, WACOM_PL_RES, WACOM_PL_RES };
4313 PL, WACOM_PL_RES, WACOM_PL_RES };
4316 PL, WACOM_PL_RES, WACOM_PL_RES };
4319 PL, WACOM_PL_RES, WACOM_PL_RES };
[all …]
A Dwacom_wac.h196 PL, enumerator
/linux/arch/arm64/boot/dts/xilinx/
A Dzynqmp-zcu111-revA.dts44 /* Another 4GB connected to PL */
431 /* refclk5 PL CLK100 */
436 /* refclk6 PL CLK125 */
A Dzynqmp-zcu106-revA.dts490 /* PL i2c via PCA9306 - u45 */
543 /* refclk6 PL CLK125 */
548 /* refclk7 PL CLK74 */
A Dzynqmp-zcu102-revA.dts492 /* PL i2c via PCA9306 - u45 */
555 /* refclk6 PL CLK125 */
560 /* refclk7 PL CLK74 */
A Dzynqmp-zcu104-revA.dts134 /* Another connection to this bus via PL i2c via PCA9306 - u45 */
A Dzynqmp-zcu104-revC.dts158 /* Another connection to this bus via PL i2c via PCA9306 - u45 */
/linux/tools/perf/scripts/perl/Perf-Trace-Util/
A DREADME22 perl Makefile.PL # to create a Makefile for the next step
/linux/drivers/fpga/
A DKconfig234 to configure the programmable logic(PL) through PS
243 configure the programmable logic(PL).
/linux/arch/arm/boot/dts/
A Dsun8i-q8-common.dtsi68 * Q8 boards use various PL# pins as wifi-en. On other boards
A Dsun8i-h2-plus-bananapi-m2-zero.dts250 /* PL */
A Dsun6i-a31s-sinovoip-bpi-m2.dts324 /* PL */
/linux/Documentation/devicetree/bindings/display/xlnx/
A Dxlnx,zynqmp-dpsub.yaml28 Mixed Audio to PL
/linux/Documentation/ABI/stable/
A Dsysfs-driver-firmware-zynqmp76 RPU, PMU, etc. Only the PL domain (FPGA)
/linux/drivers/net/ethernet/intel/ice/
A Dice_lan_tx_rx.h675 #define ICE_PTT(PTYPE, OUTER_IP, OUTER_IP_VER, OUTER_FRAG, T, TE, TEF, I, PL)\ argument
685 ICE_RX_PTYPE_PAYLOAD_LAYER_##PL }
/linux/drivers/net/ethernet/intel/iavf/
A Diavf_common.c526 #define IAVF_PTT(PTYPE, OUTER_IP, OUTER_IP_VER, OUTER_FRAG, T, TE, TEF, I, PL)\ argument
536 IAVF_RX_PTYPE_PAYLOAD_LAYER_##PL }

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