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Searched refs:REG1 (Results 1 – 20 of 20) sorted by relevance

/linux/arch/sparc/include/asm/
A Dtsb.h162 ldx [REG1 + REG2], REG1; \
187 andn REG1, REG2, REG1; \
190 or REG1, REG2, REG1; \
223 andn REG1, REG2, REG1; \
226 or REG1, REG2, REG1; \
254 or REG1, REG2, REG1; \
291 add REG1, REG2, REG1; \
346 sllx REG1, 32, REG1; \
347 or REG1, REG2, REG1; \
369 sllx REG1, 32, REG1; \
[all …]
A Dtrap_block.h184 #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) \ argument
185 lduh [THR + TI_CPU], REG1; \
187 sllx REG1, TRAP_BLOCK_SZ_SHIFT, REG1; \
189 add REG2, REG1, REG2; \
213 #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) argument
/linux/drivers/scsi/
A Dqlogicfas408.c89 REG1; in ql_zap()
231 REG1; in ql_icmd()
315 REG1; in ql_pcmd()
558 REG1; in qlogicfas408_get_chip_type()
577 REG1; in qlogicfas408_setup()
592 REG1; in qlogicfas408_detect()
606 REG1; in qlogicfas408_disable_ints()
A Dqlogicfas408.h92 #define REG1 ( outb( inb( qbase + 0xd ) | 0x80 , qbase + 0xd ), outb( 0xb4 | int_type, qbase + 0xd … macro
/linux/drivers/scsi/pcmcia/
A Dsym53c500_cs.c126 #define REG1(x) outb(C7_IMG, (x) + CONFIG7); outb(C5_IMG, (x) + CONFIG5) macro
210 REG1(io_port); in chip_init()
241 REG1(base); in SYM53C500_pio_read()
296 REG1(base); in SYM53C500_pio_write()
360 REG1(port_base); in SYM53C500_intr()
/linux/Documentation/devicetree/bindings/regulator/
A Dact8865-regulator.txt22 - vp1-supply: The input supply for REG1
43 REG1, REG2, REG3, REG4, REG5, REG6, REG7, REG8, REG9, REG10, REG11, REG12
/linux/arch/arm64/boot/dts/rockchip/
A Drk3368-evb-act8846.dts54 vcc_ddr: REG1 {
/linux/arch/arm/boot/dts/
A Drk3288-evb-act8846.dts85 vcc_ddr: REG1 {
A Drk3288-firefly-reload-core.dtsi112 vcc_ddr: REG1 {
A Drk3288-rock2-som.dtsi98 vcc_ddr: REG1 {
A Drk3188-radxarock.dts197 vcc_ddr: REG1 {
A Drk3288-r89.dts179 vcc_ddr: REG1 {
A Drk3288-miqi.dts189 vcc_ddr: REG1 {
A Drk3288-firefly.dtsi264 vcc_ddr: REG1 {
A Drk3188-bqedison2qc.dts317 vcc_ddr: REG1 {
/linux/drivers/regulator/
A Dact8865-regulator.c518 ACT88xx_REG("REG1", ACT8846, REG1, VSET, "vp1"),
/linux/sound/sparc/
A Ddbri.c240 #define REG1 0x04 /* Mode and Interrupt */ macro
1939 x = sbus_readl(dbri->regs + REG1); in snd_dbri_interrupt()
/linux/drivers/scsi/aic94xx/
A Daic94xx_dump.c343 PRINT_MIS_word(asd_ha, REG1); in asd_dump_cseq_state()
/linux/drivers/scsi/aic7xxx/
A Daic79xx_reg.h_shipped1284 #define REG1 0xa2
A Daic79xx.reg3679 REG1 {

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