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Searched refs:REG_A6XX_GMU_GMU2HOST_INTR_CLR (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/msm/adreno/
A Da6xx_gmu.xml.h329 #define REG_A6XX_GMU_GMU2HOST_INTR_CLR 0x00005191 macro
A Da6xx_gmu.c63 gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, status); in a6xx_hfi_irq()
332 gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, 1 << ack); in a6xx_gmu_set_oob()
979 gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, ~0); in a6xx_gmu_resume()
A Da6xx_hfi.c115 gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, in a6xx_hfi_wait_for_ack()

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