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Searched refs:REG_TXPAUSE (Results 1 – 25 of 35) sorted by relevance

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/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/
A Dphy.c365 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl92ce_phy_lc_calibrate()
395 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in _rtl92ce_phy_lc_calibrate()
405 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl92ce_phy_set_rf_sleep()
420 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in _rtl92ce_phy_set_rf_sleep()
A Dreg.h201 #define REG_TXPAUSE 0x0522 macro
/linux/drivers/net/wireless/realtek/rtw88/
A Dwow.c283 rtw_wow->txpause = rtw_read8(rtwdev, REG_TXPAUSE); in rtw_wow_bb_stop()
284 rtw_write8(rtwdev, REG_TXPAUSE, 0xff); in rtw_wow_bb_stop()
293 rtw_write8(rtwdev, REG_TXPAUSE, rtw_wow->txpause); in rtw_wow_bb_start()
A Dreg.h366 #define REG_TXPAUSE 0x0522 macro
A Drtw8723d.c78 rtw_write8(rtwdev, REG_TXPAUSE, 0xFF); in rtw8723d_lck()
93 rtw_write8(rtwdev, REG_TXPAUSE, 0x00); in rtw8723d_lck()
1215 rtw_write8(rtwdev, REG_TXPAUSE, 0xff); in rtw8723d_iqk_config_mac()
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
A Dphy.c1267 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl8723e_phy_lc_calibrate()
1297 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in _rtl8723e_phy_lc_calibrate()
1517 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in rtl8723e_phy_set_rf_on()
1526 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl8723e_phy_set_rf_sleep()
1541 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in _rtl8723e_phy_set_rf_sleep()
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/
A Dphy.c346 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl92cu_phy_lc_calibrate()
369 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in _rtl92cu_phy_lc_calibrate()
A Dhw.c1019 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in disable_rfafeandresetbb()
1220 rtl_write_byte(rtlpriv, REG_TXPAUSE, in _rtl92cu_stop_tx_beacon()
1221 rtl_read_byte(rtlpriv, REG_TXPAUSE) | BIT(6)); in _rtl92cu_stop_tx_beacon()
1240 rtl_write_byte(rtlpriv, REG_TXPAUSE, in _rtl92cu_resume_tx_beacon()
1241 rtl_read_byte(rtlpriv, REG_TXPAUSE) & (~BIT(6))); in _rtl92cu_resume_tx_beacon()
/linux/drivers/staging/r8188eu/hal/
A DHalPhyRf_8188e.c805 REG_TXPAUSE, REG_BCN_CTRL, in phy_IQCalibrate_8188E()
946 ODM_Write1Byte(dm_odm, REG_TXPAUSE, 0xFF); /* block all queues */ in phy_LCCalibrate_8188E()
986 ODM_Write1Byte(dm_odm, REG_TXPAUSE, 0x00); in phy_LCCalibrate_8188E()
A Dusb_halinit.c1281 rtw_write8(Adapter, REG_TXPAUSE, *((u8 *)val)); in SetHwReg8188EU()
1682 rtw_write8(Adapter, REG_TXPAUSE, 0xff); in SetHwReg8188EU()
1738 val[0] = rtw_read8(Adapter, REG_TXPAUSE); in GetHwReg8188EU()
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
A Dphy.c1839 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl88e_phy_lc_calibrate()
1869 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in _rtl88e_phy_lc_calibrate()
2144 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in rtl88ee_phy_set_rf_on()
2151 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl88ee_phy_set_rf_sleep()
A Dreg.h222 #define REG_TXPAUSE 0x0522 macro
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
A Dphy.c2189 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl8723be_phy_lc_calibrate()
2225 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in _rtl8723be_phy_lc_calibrate()
2493 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in rtl8723be_phy_set_rf_on()
2500 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl8723be_phy_set_rf_sleep()
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192c/
A Dphy_common.c1594 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in rtl92ce_phy_set_rf_on()
1604 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl92c_phy_set_rf_sleep()
1619 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in _rtl92c_phy_set_rf_sleep()
/linux/drivers/net/wireless/realtek/rtl8xxxu/
A Drtl8xxxu_8192e.c1072 REG_TXPAUSE, REG_BEACON_CTRL, in rtl8192eu_phy_iqcalibrate()
1449 rtl8xxxu_write8(priv, REG_TXPAUSE, 0xff); in rtl8192eu_active_to_lps()
A Drtl8xxxu_core.c1031 rtl8xxxu_write8(priv, REG_TXPAUSE, 0x00); in rtl8xxxu_gen1_enable_rf()
3128 REG_TXPAUSE, REG_BEACON_CTRL, in rtl8xxxu_phy_iqcalibrate()
3457 rtl8xxxu_write8(priv, REG_TXPAUSE, 0xff); in rtl8723a_phy_lc_calibrate()
3483 rtl8xxxu_write8(priv, REG_TXPAUSE, 0x00); in rtl8723a_phy_lc_calibrate()
3600 rtl8xxxu_write8(priv, REG_TXPAUSE, 0xff); in rtl8xxxu_active_to_lps()
3701 rtl8xxxu_write8(priv, REG_TXPAUSE, 0xff); in rtl8xxxu_flush_fifo()
6429 rtl8xxxu_write8(priv, REG_TXPAUSE, 0xff); in rtl8xxxu_stop()
6443 rtl8xxxu_write8(priv, REG_TXPAUSE, 0xff); in rtl8xxxu_stop()
A Drtl8xxxu_regs.h615 #define REG_TXPAUSE 0x0522 macro
A Drtl8xxxu_8723b.c896 REG_TXPAUSE, REG_BEACON_CTRL, in rtl8723bu_phy_iqcalibrate()
/linux/drivers/staging/rtl8723bs/hal/
A DHalPhyRf_8723B.c1348 REG_TXPAUSE, in phy_IQCalibrate_8723B()
1524 rtw_write8(pDM_Odm->Adapter, REG_TXPAUSE, 0xFF); /* block all queues */ in phy_LCCalibrate_8723B()
1570 rtw_write8(pDM_Odm->Adapter, REG_TXPAUSE, 0x00); in phy_LCCalibrate_8723B()
A Drtl8723b_hal_init.c1700 pHalData->RegTxPause = rtw_read8(padapter, REG_TXPAUSE); in rtl8723b_InitBeaconParameters()
3294 rtw_write8(padapter, REG_TXPAUSE, *val); in SetHwReg8723B()
3555 rtw_write8(padapter, REG_TXPAUSE, 0xff); in SetHwReg8723B()
3680 *val = rtw_read8(padapter, REG_TXPAUSE); in GetHwReg8723B()
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/
A Dphy.c2682 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl92ee_phy_lc_calibrate()
2712 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in _rtl92ee_phy_lc_calibrate()
3027 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in rtl92ee_phy_set_rf_on()
3034 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl92ee_phy_set_rf_sleep()
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
A Dphy.c2543 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl92d_phy_lc_calibrate_sw()
2623 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in _rtl92d_phy_lc_calibrate_sw()
2994 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in _rtl92d_phy_set_rfon()
3004 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl92d_phy_set_rfsleep()
3028 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); in _rtl92d_phy_set_rfsleep()
A Dreg.h229 #define REG_TXPAUSE 0x0522 macro
/linux/drivers/staging/r8188eu/include/
A Drtl8188e_spec.h240 #define REG_TXPAUSE 0x0522 macro
/linux/drivers/staging/rtl8723bs/include/
A Dhal_com_reg.h292 #define REG_TXPAUSE 0x0522 macro

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