Searched refs:RK3288_CLKGEN_DIV (Results 1 – 1 of 1) sorted by relevance
18 #define RK3288_CLKGEN_DIV 2 macro48 cclkin = 2 * ios->clock * RK3288_CLKGEN_DIV; in dw_mci_rk3288_set_ios()50 cclkin = ios->clock * RK3288_CLKGEN_DIV; in dw_mci_rk3288_set_ios()56 bus_hz = clk_get_rate(host->ciu_clk) / RK3288_CLKGEN_DIV; in dw_mci_rk3288_set_ios()298 host->bus_hz /= RK3288_CLKGEN_DIV; in dw_mci_rockchip_init()
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