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Searched refs:RST_BUS_MMC1 (Results 1 – 25 of 28) sorted by relevance

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/linux/include/dt-bindings/reset/
A Dsun8i-v3s-ccu.h56 #define RST_BUS_MMC1 8 macro
A Dsuniv-ccu-f1c100s.h13 #define RST_BUS_MMC1 3 macro
A Dsun8i-a23-a33-ccu.h54 #define RST_BUS_MMC1 8 macro
A Dsun8i-a83t-ccu.h57 #define RST_BUS_MMC1 9 macro
A Dsun50i-a64-ccu.h55 #define RST_BUS_MMC1 9 macro
A Dsun8i-h3-ccu.h56 #define RST_BUS_MMC1 8 macro
A Dsun50i-h616-ccu.h24 #define RST_BUS_MMC1 15 macro
A Dsun50i-a100-ccu.h25 #define RST_BUS_MMC1 16 macro
A Dsun50i-h6-ccu.h28 #define RST_BUS_MMC1 19 macro
A Dsun8i-r40-ccu.h57 #define RST_BUS_MMC1 9 macro
/linux/drivers/clk/sunxi-ng/
A Dccu-sun8i-v3s.c725 [RST_BUS_MMC1] = { 0x2c0, BIT(9) },
760 [RST_BUS_MMC1] = { 0x2c0, BIT(9) },
A Dccu-suniv-f1c100s.c475 [RST_BUS_MMC1] = { 0x2c0, BIT(9) },
A Dccu-sun8i-h3.c990 [RST_BUS_MMC1] = { 0x2c0, BIT(9) },
1053 [RST_BUS_MMC1] = { 0x2c0, BIT(9) },
A Dccu-sun8i-a23.c680 [RST_BUS_MMC1] = { 0x2c0, BIT(9) },
A Dccu-sun8i-a33.c725 [RST_BUS_MMC1] = { 0x2c0, BIT(9) },
A Dccu-sun50i-a64.c867 [RST_BUS_MMC1] = { 0x2c0, BIT(9) },
A Dccu-sun8i-a83t.c810 [RST_BUS_MMC1] = { 0x2c0, BIT(9) },
A Dccu-sun50i-h616.c998 [RST_BUS_MMC1] = { 0x84c, BIT(17) },
A Dccu-sun50i-a100.c1083 [RST_BUS_MMC1] = { 0x84c, BIT(17) },
A Dccu-sun50i-h6.c1100 [RST_BUS_MMC1] = { 0x84c, BIT(17) },
A Dccu-sun8i-r40.c1176 [RST_BUS_MMC1] = { 0x2c0, BIT(9) },
/linux/arch/arm/boot/dts/
A Dsun8i-v3s.dtsi252 resets = <&ccu RST_BUS_MMC1>;
A Dsun8i-a23-a33.dtsi250 resets = <&ccu RST_BUS_MMC1>;
A Dsunxi-h3-h5.dtsi212 resets = <&ccu RST_BUS_MMC1>;
/linux/arch/arm64/boot/dts/allwinner/
A Dsun50i-h6.dtsi461 resets = <&ccu RST_BUS_MMC1>;

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