1 /* SPDX-License-Identifier: GPL-2.0 */
2 /******************************************************************************
3  *
4  * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
5  *
6  * Modifications for inclusion into the Linux staging tree are
7  * Copyright(c) 2010 Larry Finger. All rights reserved.
8  *
9  * Contact information:
10  * WLAN FAE <wlanfae@realtek.com>
11  * Larry Finger <Larry.Finger@lwfinger.net>
12  *
13  ******************************************************************************/
14 #ifndef __RTL8712_SPEC_H__
15 #define __RTL8712_SPEC_H__
16 
17 #define RTL8712_IOBASE_TXPKT		0x10200000	/*IOBASE_TXPKT*/
18 #define RTL8712_IOBASE_RXPKT		0x10210000	/*IOBASE_RXPKT*/
19 #define RTL8712_IOBASE_RXCMD		0x10220000	/*IOBASE_RXCMD*/
20 #define RTL8712_IOBASE_TXSTATUS		0x10230000	/*IOBASE_TXSTATUS*/
21 #define RTL8712_IOBASE_RXSTATUS		0x10240000	/*IOBASE_RXSTATUS*/
22 #define RTL8712_IOBASE_IOREG		0x10250000	/*IOBASE_IOREG ADDR*/
23 #define RTL8712_IOBASE_SCHEDULER	0x10260000	/*IOBASE_SCHEDULE*/
24 
25 #define RTL8712_IOBASE_TRXDMA		0x10270000	/*IOBASE_TRXDMA*/
26 #define RTL8712_IOBASE_TXLLT		0x10280000	/*IOBASE_TXLLT*/
27 #define RTL8712_IOBASE_WMAC		0x10290000	/*IOBASE_WMAC*/
28 #define RTL8712_IOBASE_FW2HW		0x102A0000	/*IOBASE_FW2HW*/
29 #define RTL8712_IOBASE_ACCESS_PHYREG	0x102B0000	/*IOBASE_ACCESS_PHYREG*/
30 
31 #define RTL8712_IOBASE_FF	0x10300000 /*IOBASE_FIFO 0x1031000~0x103AFFFF*/
32 
33 
34 /*IOREG Offset for 8712*/
35 #define RTL8712_SYSCFG_		RTL8712_IOBASE_IOREG
36 #define RTL8712_CMDCTRL_	(RTL8712_IOBASE_IOREG + 0x40)
37 #define RTL8712_MACIDSETTING_	(RTL8712_IOBASE_IOREG + 0x50)
38 #define RTL8712_TIMECTRL_	(RTL8712_IOBASE_IOREG + 0x80)
39 #define RTL8712_FIFOCTRL_	(RTL8712_IOBASE_IOREG + 0xA0)
40 #define RTL8712_RATECTRL_	(RTL8712_IOBASE_IOREG + 0x160)
41 #define RTL8712_EDCASETTING_	(RTL8712_IOBASE_IOREG + 0x1D0)
42 #define RTL8712_WMAC_		(RTL8712_IOBASE_IOREG + 0x200)
43 #define RTL8712_SECURITY_	(RTL8712_IOBASE_IOREG + 0x240)
44 #define RTL8712_POWERSAVE_	(RTL8712_IOBASE_IOREG + 0x260)
45 #define RTL8712_GP_		(RTL8712_IOBASE_IOREG + 0x2E0)
46 #define RTL8712_INTERRUPT_	(RTL8712_IOBASE_IOREG + 0x300)
47 #define RTL8712_DEBUGCTRL_	(RTL8712_IOBASE_IOREG + 0x310)
48 #define RTL8712_OFFLOAD_	(RTL8712_IOBASE_IOREG + 0x2D0)
49 
50 
51 /*FIFO for 8712*/
52 #define RTL8712_DMA_BCNQ	(RTL8712_IOBASE_FF + 0x10000)
53 #define RTL8712_DMA_MGTQ	(RTL8712_IOBASE_FF + 0x20000)
54 #define RTL8712_DMA_BMCQ	(RTL8712_IOBASE_FF + 0x30000)
55 #define RTL8712_DMA_VOQ		(RTL8712_IOBASE_FF + 0x40000)
56 #define RTL8712_DMA_VIQ		(RTL8712_IOBASE_FF + 0x50000)
57 #define RTL8712_DMA_BEQ		(RTL8712_IOBASE_FF + 0x60000)
58 #define RTL8712_DMA_BKQ		(RTL8712_IOBASE_FF + 0x70000)
59 #define RTL8712_DMA_RX0FF	(RTL8712_IOBASE_FF + 0x80000)
60 #define RTL8712_DMA_H2CCMD	(RTL8712_IOBASE_FF + 0x90000)
61 #define RTL8712_DMA_C2HCMD	(RTL8712_IOBASE_FF + 0xA0000)
62 
63 
64 /*------------------------------*/
65 
66 /*BIT 16 15*/
67 #define	DID_SDIO_LOCAL			0	/* 0 0*/
68 #define	DID_WLAN_IOREG			1	/* 0 1*/
69 #define	DID_WLAN_FIFO			3	/* 1 1*/
70 #define   DID_UNDEFINE				(-1)
71 
72 #define CMD_ADDR_MAPPING_SHIFT		2	/*SDIO CMD ADDR MAPPING,
73 						 *shift 2 bit for match
74 						 * offset[14:2]
75 						 */
76 
77 /*Offset for SDIO LOCAL*/
78 #define	OFFSET_SDIO_LOCAL				0x0FFF
79 
80 /*Offset for WLAN IOREG*/
81 #define OFFSET_WLAN_IOREG				0x0FFF
82 
83 /*Offset for WLAN FIFO*/
84 #define	OFFSET_TX_BCNQ				0x0300
85 #define	OFFSET_TX_HIQ					0x0310
86 #define	OFFSET_TX_CMDQ				0x0320
87 #define	OFFSET_TX_MGTQ				0x0330
88 #define	OFFSET_TX_HCCAQ				0x0340
89 #define	OFFSET_TX_VOQ					0x0350
90 #define	OFFSET_TX_VIQ					0x0360
91 #define	OFFSET_TX_BEQ					0x0370
92 #define	OFFSET_TX_BKQ					0x0380
93 #define	OFFSET_RX_RX0FFQ				0x0390
94 #define	OFFSET_RX_C2HFFQ				0x03A0
95 
96 #define	BK_QID_01	1
97 #define	BK_QID_02	2
98 #define	BE_QID_01	0
99 #define	BE_QID_02	3
100 #define	VI_QID_01	4
101 #define	VI_QID_02	5
102 #define	VO_QID_01	6
103 #define	VO_QID_02	7
104 #define	HCCA_QID_01	8
105 #define	HCCA_QID_02	9
106 #define	HCCA_QID_03	10
107 #define	HCCA_QID_04	11
108 #define	HCCA_QID_05	12
109 #define	HCCA_QID_06	13
110 #define	HCCA_QID_07	14
111 #define	HCCA_QID_08	15
112 #define	HI_QID		17
113 #define	CMD_QID	19
114 #define	MGT_QID	18
115 #define	BCN_QID	16
116 
117 #include "rtl8712_regdef.h"
118 
119 #include "rtl8712_bitdef.h"
120 
121 #include "basic_types.h"
122 
123 #endif /* __RTL8712_SPEC_H__ */
124 
125