| /linux/arch/x86/crypto/ |
| A D | blowfish-x86_64-asm_64.S | 24 #define RX0 %rax macro
60 rorq $16, RX0; \
63 rolq $16, RX0; \
71 xorq RT0, RX0;
85 xorq RT0, RX0;
96 bswapq RX0;
99 bswapq RX0; \
212 F4(RX0); \
217 F4(RX0); \
233 F4(RX0); \
[all …]
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| A D | sm4-aesni-avx-asm_64.S | 21 #define RX0 %xmm0 macro
190 vbroadcastss (4*(round))(%rdi), RX0; \
191 vpxor s1, RX0, RX0; \
192 vpxor s2, RX0, RX0; \
193 vpxor s3, RX0, RX0; /* s1 ^ s2 ^ s3 ^ rk */ \
196 transform_pre(RX0, RTMP4, RB0, MASK_4BIT, RTMP0); \
197 vaesenclast MASK_4BIT, RX0, RX0; \
283 vpxor s1, RX0, RX0; \
284 vpxor s2, RX0, RX0; \
285 vpxor s3, RX0, RX0; /* s1 ^ s2 ^ s3 ^ rk */ \
[all …]
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| A D | sm4-aesni-avx2-asm_64.S | 22 #define RX0 %ymm0 macro
185 vpbroadcastd (4*(round))(%rdi), RX0; \
188 vmovdqa RX0, RX1; \
189 vpxor s1, RX0, RX0; \
190 vpxor s2, RX0, RX0; \
191 vpxor s3, RX0, RX0; /* s1 ^ s2 ^ s3 ^ rk */ \
199 transform_pre(RX0, RTMP4, RTMP1, MASK_4BIT, RTMP0); \
201 vextracti128 $1, RX0, RTMP4x; \
207 vinserti128 $1, RTMP4x, RX0, RX0; \
210 transform_post(RX0, RTMP2, RTMP3, MASK_4BIT, RTMP0); \
[all …]
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| A D | twofish-avx-x86_64-asm_64.S | 47 #define RX0 %xmm8 macro
175 round_head_2(a, b, RX0, RY0, RX1, RY1); \
183 round_head_2(a, b, RX0, RY0, RX1, RY1); \
246 inpack_blocks(RA1, RB1, RC1, RD1, RK1, RX0, RY0, RK2);
249 inpack_blocks(RA2, RB2, RC2, RD2, RK1, RX0, RY0, RK2);
267 outunpack_blocks(RC1, RD1, RA1, RB1, RK1, RX0, RY0, RK2);
268 outunpack_blocks(RC2, RD2, RA2, RB2, RK1, RX0, RY0, RK2);
287 inpack_blocks(RC1, RD1, RA1, RB1, RK1, RX0, RY0, RK2);
290 inpack_blocks(RC2, RD2, RA2, RB2, RK1, RX0, RY0, RK2);
307 outunpack_blocks(RA1, RB1, RC1, RD1, RK1, RX0, RY0, RK2);
[all …]
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| A D | twofish-x86_64-asm_64-3way.S | 53 #define RX0 %r8 macro
146 enc_round_end(ab ## 0, RX0, RY0, n); \
153 dec_round_end(ba ## 0, RX0, RY0, n); \
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| /linux/Documentation/devicetree/bindings/phy/ |
| A D | rockchip-mipi-dphy-rx0.yaml | 7 title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings
14 The Rockchip SoC has a MIPI D-PHY bus with an RX0 entry which connects to
24 - description: MIPI D-PHY RX0 cfg clock
53 * MIPI D-PHY RX0 use registers in "general register files", it
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| A D | rockchip-inno-csi-dphy.yaml | 7 title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings
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| /linux/drivers/phy/rockchip/ |
| A D | Kconfig | 13 tristate "Rockchip MIPI Synopsys DPHY RX0 driver"
18 Enable this to support the Rockchip MIPI Synopsys DPHY RX0
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| /linux/Documentation/devicetree/bindings/media/ |
| A D | rockchip-isp1.yaml | 75 description: connection point for sensors at MIPI-DPHY RX0
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| /linux/arch/powerpc/boot/dts/ |
| A D | eiger.dts | 138 /*COAL RX0*/ 0x1c 0x2
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| A D | redwood.dts | 134 /*COAL RX0*/ 0x1c 0x2
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| /linux/drivers/pinctrl/renesas/ |
| A D | pfc-r8a77970.c | 224 #define IP7_23_20 FM(SCL2) FM(DU_DB0) FM(TCLK1_A) FM(WE1_N) FM(RX0) FM(MSIOF0_SS1) F_(0, 0) F_…
682 PINMUX_IPSR_GPSR(IP7_23_20, RX0),
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| A D | pfc-r8a77980.c | 257 #define IP7_23_20 FM(SCL2) F_(0, 0) F_(0, 0) FM(WE1_N) FM(RX0) FM(HRX0_B) F_(0, 0) F_(0, 0) F_…
746 PINMUX_IPSR_GPSR(IP7_23_20, RX0),
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| A D | pfc-r8a77950.c | 208 #define GPSR5_1 F_(RX0, IP10_31_28)
344 #define IP10_31_28 FM(RX0) FM(HRX1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SCK0_C) FM(STP_ISCLK_0_…
1138 PINMUX_IPSR_GPSR(IP10_31_28, RX0),
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| A D | pfc-r8a77951.c | 209 #define GPSR5_1 F_(RX0, IP11_31_28)
354 #define IP11_31_28 FM(RX0) FM(HRX1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SCK0_C) FM(STP_ISCLK_0_…
1184 PINMUX_IPSR_GPSR(IP11_31_28, RX0),
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| A D | pfc-r8a7796.c | 214 #define GPSR5_1 F_(RX0, IP11_31_28)
359 #define IP11_31_28 FM(RX0) FM(HRX1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SCK0_C) FM(STP_ISCLK_0_…
1191 PINMUX_IPSR_GPSR(IP11_31_28, RX0),
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| A D | pfc-r8a77965.c | 214 #define GPSR5_1 F_(RX0, IP11_31_28)
359 #define IP11_31_28 FM(RX0) FM(HRX1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SCK0_C) FM(STP_ISCLK_0_…
1194 PINMUX_IPSR_GPSR(IP11_31_28, RX0),
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| A D | pfc-r8a779a0.c | 358 #define IP0SR1_7_4 FM(HRX0) FM(RX0) F_(0, 0) F_(0, 0) F_(0, 0) FM(A1) F_(0, 0) F_(0, 0) F_(0, 0) …
788 PINMUX_IPSR_GPSR(IP0SR1_7_4, RX0),
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| A D | pfc-r8a7792.c | 459 PINMUX_SINGLE(RX0),
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| A D | pfc-r8a7779.c | 1142 PINMUX_IPSR_MSEL(IP8_15_12, RX0, SEL_SCIF0_0),
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| A D | pfc-r8a7790.c | 1602 PINMUX_IPSR_MSEL(IP14_8_6, RX0, SEL_SCIF0_0),
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| A D | pfc-r8a7791.c | 935 PINMUX_IPSR_MSEL(IP2_12_10, RX0, SEL_SCIF0_0),
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