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Searched refs:RZG2L_PORT_PINMUX (Results 1 – 4 of 4) sorted by relevance

/linux/arch/arm64/boot/dts/renesas/
A Drzg2l-smarc-som.dtsi140 <RZG2L_PORT_PINMUX(27, 1, 1)>, /* ET0_MDC */
141 <RZG2L_PORT_PINMUX(28, 0, 1)>, /* ET0_MDIO */
142 <RZG2L_PORT_PINMUX(20, 0, 1)>, /* ET0_TXC */
144 <RZG2L_PORT_PINMUX(20, 2, 1)>, /* ET0_TXD0 */
145 <RZG2L_PORT_PINMUX(21, 0, 1)>, /* ET0_TXD1 */
146 <RZG2L_PORT_PINMUX(21, 1, 1)>, /* ET0_TXD2 */
147 <RZG2L_PORT_PINMUX(22, 0, 1)>, /* ET0_TXD3 */
148 <RZG2L_PORT_PINMUX(24, 0, 1)>, /* ET0_RXC */
158 <RZG2L_PORT_PINMUX(37, 0, 1)>, /* ET1_MDC */
160 <RZG2L_PORT_PINMUX(29, 0, 1)>, /* ET1_TXC */
[all …]
A Drzg2l-smarc.dtsi166 pinmux = <RZG2L_PORT_PINMUX(10, 1, 2)>, /* TX */
167 <RZG2L_PORT_PINMUX(11, 0, 2)>; /* RX */
180 <RZG2L_PORT_PINMUX(13, 0, 2)>; /* RX */
203 <RZG2L_PORT_PINMUX(18, 1, 3)>; /* SCL */
208 <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
257 <RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */
258 <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
259 <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
264 <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */
265 <RZG2L_PORT_PINMUX(5, 1, 1)>; /* OTG_ID */
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
A Drenesas,rzg2l-pinctrl.yaml71 alternate function configuration number using the RZG2L_PORT_PINMUX()
122 pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* Tx */
123 <RZG2L_PORT_PINMUX(38, 1, 1)>; /* Rx */
140 pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>, /* CD */
141 <RZG2L_PORT_PINMUX(19, 1, 1)>; /* WP */
/linux/include/dt-bindings/pinctrl/
A Drzg2l-pinctrl.h18 #define RZG2L_PORT_PINMUX(b, p, f) ((b) * RZG2L_PINS_PER_PORT + (p) | ((f) << 16)) macro

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