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Searched refs:S3C2410_CS5 (Results 1 – 8 of 8) sorted by relevance

/linux/arch/arm/mach-s3c/
A Dbast.h78 #define BAST_PA_CTRL1 (S3C2410_CS5 | 0x7800000)
91 #define BAST_PA_PC104_IRQREQ (S3C2410_CS5 | 0x6000000)
94 #define BAST_PA_PC104_IRQRAW (S3C2410_CS5 | 0x6800000)
97 #define BAST_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000)
192 #define BAST_IDE_CS S3C2410_CS5
A Dvr1000.h33 #define VR1000_PA_CTRL1 (S3C2410_CS5 | 0x7800000)
46 #define VR1000_PA_PC104_IRQREQ (S3C2410_CS5 | 0x6000000) /* 0x01700000 */
49 #define VR1000_PA_PC104_IRQRAW (S3C2410_CS5 | 0x6800000) /* 0x01800000 */
52 #define VR1000_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000) /* 0x01900000 */
A Dmach-vr1000.c61 #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
183 [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4),
184 [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40),
190 [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4),
191 [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40),
A Dmach-bast.c69 #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
300 [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000, 4),
301 [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000 + 0x40, 0x40),
378 [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET, 0x18 * 0x20),
379 [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20), 1),
396 [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x18 * 0x20), \
A Dmach-osiris.c58 .pfn = __phys_to_pfn(S3C2410_CS5),
63 .pfn = __phys_to_pfn(S3C2410_CS5),
A Dmap-s3c24xx.h122 #define S3C2410_CS5 (0x28000000) macro
A Dmach-anubis.c271 [0] = DEFINE_RES_MEM(S3C2410_CS5, 0x20 * 0x20),
/linux/Documentation/networking/device_drivers/ethernet/davicom/
A Ddm9000.rst41 .start = S3C2410_CS5 + BAST_PA_DM9000,
42 .end = S3C2410_CS5 + BAST_PA_DM9000 + 3,
46 .start = S3C2410_CS5 + BAST_PA_DM9000 + 0x40,
47 .end = S3C2410_CS5 + BAST_PA_DM9000 + 0x40 + 0x3f,

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