Home
last modified time | relevance | path

Searched refs:SDHCI_HOST_CONTROL2 (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/mmc/host/
A Dsdhci-pci-gli.c241 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in gli_set_9750()
243 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
261 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in gli_set_9750()
263 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
307 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_execute_tuning_9750()
712 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_set_gl9763e_signaling()
723 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_set_gl9763e_signaling()
A Dsdhci-xenon.c201 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_set_uhs_signaling()
219 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in xenon_set_uhs_signaling()
253 sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_voltage_switch()
307 reg = sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_set_ios()
309 sdhci_writew(host, reg, SDHCI_HOST_CONTROL2); in xenon_set_ios()
A Dsdhci.c98 sdhci_readw(host, SDHCI_HOST_CONTROL2)); in sdhci_dumpregs()
130 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_do_enable_v4_mode()
135 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_do_enable_v4_mode()
303 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_config_dma()
305 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_config_dma()
2566 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_start_signal_voltage_switch()
2574 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); in sdhci_start_signal_voltage_switch()
2674 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_start_tuning()
2678 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); in sdhci_start_tuning()
2706 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_reset_tuning()
[all …]
A Dsdhci-sprd.c326 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_sprd_set_uhs_signaling()
358 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_sprd_set_uhs_signaling()
520 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_sprd_hs400_enhanced_strobe()
523 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_sprd_hs400_enhanced_strobe()
A Dsdhci-brcmstb.c75 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_brcmstb_set_uhs_signaling()
94 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_brcmstb_set_uhs_signaling()
A Dsdhci-acpi.c614 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_set_ios()
616 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_set_ios()
618 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_set_ios()
620 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_set_ios()
A Dsdhci-st.c261 u16 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_st_set_uhs_signaling()
304 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_st_set_uhs_signaling()
A Dsdhci-of-dwcmshc.c136 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in dwcmshc_set_uhs_signaling()
154 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in dwcmshc_set_uhs_signaling()
A Dsdhci-pxav3.c250 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in pxav3_set_uhs_signaling()
294 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in pxav3_set_uhs_signaling()
A Dsdhci-msm.c1322 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_msm_set_uhs_signaling()
1382 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_msm_set_uhs_signaling()
2202 case SDHCI_HOST_CONTROL2: in __sdhci_msm_check_write()
2339 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
2361 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
2368 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
A Dsdhci-pci-core.c1618 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1620 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1622 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1624 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
A Dsdhci.h181 #define SDHCI_HOST_CONTROL2 0x3E macro
A Dsdhci-pci-o2micro.c204 u16 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_o2_execute_tuning()
A Dsdhci-esdhc-imx.c604 if (unlikely(reg == SDHCI_HOST_CONTROL2)) { in esdhc_readw_le()
663 case SDHCI_HOST_CONTROL2: in esdhc_writew_le()

Completed in 38 milliseconds