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Searched refs:SDR0_ETH_CFG_ECS (Results 1 – 2 of 2) sorted by relevance

/linux/arch/powerpc/include/asm/
A Ddcr-regs.h81 #define SDR0_ETH_CFG_ECS 0x00000100 /* EMAC int clk source */ macro
/linux/drivers/net/ethernet/ibm/emac/
A Dcore.c377 0, SDR0_ETH_CFG_ECS << dev->cell_index); in emac_reset()
381 SDR0_ETH_CFG_ECS << dev->cell_index, 0); in emac_reset()
403 SDR0_ETH_CFG_ECS << dev->cell_index, 0); in emac_reset()

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