Searched refs:SIMD (Results 1 – 13 of 13) sorted by relevance
| /linux/lib/crypto/ |
| A D | Kconfig | 23 fallback, e.g., for SIMD implementations. If no arch specific
49 fallback, e.g., for SIMD implementations. If no arch specific
74 fallback, e.g., for SIMD implementations. If no arch specific
109 fallback, e.g., for SIMD implementations. If no arch specific
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| /linux/drivers/gpu/drm/amd/amdkfd/ |
| A D | kfd_dbgmgr.h | 84 uint32_t SIMD:2; /* SIMD id */ member
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| A D | kfd_dbgdev.c | 507 reg_sq_cmd.bits.simd_id = pMsg->ui32.SIMD; in dbgdev_wave_control_set_registers()
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| /linux/arch/arm/crypto/ |
| A D | Kconfig | 156 tristate "Accelerated scalar and SIMD Poly1305 hash implementations"
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| /linux/Documentation/arm64/ |
| A D | sve.rst | 483 * All SVE register bits that are not shared with FP/SIMD are caller-save.
491 Appendix B. ARMv8-A FP/SIMD programmer's model
499 ARMv8-A defines the following floating-point / SIMD register state:
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| A D | booting.rst | 293 For CPUs with Advanced SIMD and floating point support:
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| /linux/tools/arch/x86/kcpuid/ |
| A D | cpuid.csv | 20 1, 0, ECX, 0, sse3, Streaming SIMD Extensions 3(SSE3)
29 1, 0, ECX, 9, ssse3, Supplemental Streaming SIMD Extensions 3 (SSSE3)
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| /linux/crypto/ |
| A D | Kconfig | 339 bool "Support SIMD acceleration for AEGIS-128"
775 in IETF protocols. This is the x86_64 assembler implementation using SIMD
917 using powerpc SPE SIMD instruction set.
939 implemented using powerpc SPE SIMD instruction set.
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| /linux/Documentation/admin-guide/hw-vuln/ |
| A D | core-scheduling.rst | 223 that uses SIMD instructions etc.
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| /linux/arch/mips/ |
| A D | Kconfig | 2457 bool "Support for the MIPS SIMD Architecture"
2462 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2463 and a set of SIMD instructions to operate on them. When this option
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| /linux/arch/arm/ |
| A D | Kconfig | 1968 bool "Advanced SIMD (NEON) Extension support"
1971 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
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| /linux/arch/arm64/ |
| A D | Kconfig | 1822 execution state which complements and extends the SIMD functionality
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| /linux/Documentation/virt/kvm/ |
| A D | api.rst | 2455 arm64 core/FP-SIMD registers have the following id bit patterns. Note
2610 if the guest FPU mode is changed. MIPS SIMD Architecture (MSA) vector
6291 This capability allows the use of the MIPS SIMD Architecture (MSA) by the guest.
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