Searched refs:SMMU_PMCG_CNTENCLR0 (Results 1 – 1 of 1) sorted by relevance
64 #define SMMU_PMCG_CNTENCLR0 0xC20 macro179 writeq(BIT(idx), smmu_pmu->reg_base + SMMU_PMCG_CNTENCLR0); in smmu_pmu_counter_disable()734 smmu_pmu->reg_base + SMMU_PMCG_CNTENCLR0); in smmu_pmu_reset()
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