Searched refs:SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT (Results 1 – 16 of 16) sorted by relevance
34 #define SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT 3 macro
631 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +661 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +
1521 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +1551 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +1651 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 4 +1681 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 4 +
563 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +
2428 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 6 +2464 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 6 +2496 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 6 +2528 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 6 +
559 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +
767 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +
1789 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 4 +1945 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +2045 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 4 +
1811 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +1843 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 4 +
1913 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +1946 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 4 +
2012 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +2043 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 4 +
1113 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 4 +
1680 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 6 +
1712 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 6 * 2 +
6912 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +6967 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +7006 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +
9377 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +9434 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +9470 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +
Completed in 106 milliseconds