Searched refs:SPRN_DCCR (Results 1 – 2 of 2) sorted by relevance

/linux/arch/powerpc/mm/nohash/
A D	40x.c	82 mtspr(SPRN_DCCR, 0xFFFF0000); /* 2GByte of data space at 0x0. */ in MMU_init_hw()
/linux/arch/powerpc/include/asm/
A D	reg_booke.h	180 #define SPRN_DCCR 0x3FA /* Data Cache Cacheability Register */ macro

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